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CCS/MSP430FR2633: Custom Bootloader for FR2633

Murugavelu Thangavelu1
Intellectual 405 points
Part Number: MSP430FR2633
Other Parts Discussed in Thread: MSP430FR5739,

Tool/software: Code Composer Studio

Hi,

We are implementing a custom bootloader for FR2633 series due to non availability of the standard bootloader, during testing we bricked a controller due to few memory overlaps in the linker script. Please find the updated linker script below for the bootloader modified (from MSP430FR5739) as per FR2633 memory mapping. Kindly confirm if the linker script is good. Also would like to know what "BOOT_SHARED_CALLBACKS" is used for ? As per theoritical calculation it should be 0xFF78. Is the a problem in placing it in 0xFF70, just that the next 8 bytes are unused before the start of the BSLsignature & JTAGSignature.

Thank you

With Regards,

Muruga

Bootloader Linker File

/* RAM Memory Addresses */
__RAM_Start = 0x2000;                                 /* RAM Start  */
__RAM_End = 0x2FFF;                                 /* RAM End  */
                                                    /* RAM shared between App and Bootloader, must be reserved */
    PassWd = 0x2000;                                 /* Password sent by App to force boot  mode */
    StatCtrl = 0x2002;                                 /* Status and Control  byte used by Comm */
    CI_State_Machine = 0x2003;                         /* State machine variable used by Comm */
    CI_Callback_ptr = 0x2004;                       /* Pointer to Comm callback structure */
                                                    /* Unreserved RAM used for Bootloader or App purposes */
    _NonReserved_RAM_Start = 0x2006;                 /* Non-reserved RAM */

/* Flash memory addresses */
__Flash_Start = 0xC400;                             /* Start of Flash */
__Flash_End = 0xFFFF;                               /* End of Flash */
                                                    /* Reserved Flash locations for Bootloader Area */
    __Boot_Start = 0xFA00;                             /* Boot flash */
    __Boot_Reset = 0xFFFE;                          /* Boot reset vector */
    __Boot_VectorTable = 0xFF88;                      /* Boot vector table */
    __Boot_SharedCallbacks_Len = 8;                 /* Length of shared callbacks (2 calls =4B(msp430) or 8B(msp430x) */
    __Boot_SharedCallbacks = 0xFF70;                 /* Start of Shared callbacks changed from FF80 to FF70 to avoid memoery overlap of JTAG Signature and BSL Signature*/
                                                    /* Reserved Flash locations for Application Area */
    _AppChecksum = (__Flash_Start);                 /* CRC16 of Application */
    _AppChecksum_8 = (__Flash_Start+2);             /* CRC8 of Application */
    _App_Start = (__Flash_Start+3);                 /* Application Area */
    _App_End = (__Boot_Start-1);                    /* End of application area (before boot) */
    _CRC_Size = (_App_End - _App_Start +1);         /* Number of bytes calculated for CRC */
    _App_Reset_Vector = (__Boot_Start-2);           /* Address of Application reset vector */
    _App_Proxy_Vector_Start = 0xF988;                 /* CHANGED TO ACCOMODATE 4 MORE VECTORS Proxy interrupt table */


/* MEMORY definition, adjust based on definitions above */
MEMORY
{
    SFR                     : origin = 0x0000, length = 0x0010
    PERIPHERALS_8BIT        : origin = 0x0010, length = 0x00F0
    PERIPHERALS_16BIT       : origin = 0x0100, length = 0x0100
    //     RAM from _NonReserved_RAM_Start - __RAM_End
    //    Muruga    4K RAM
    RAM                     : origin = 0x2006, length = 0xFFA        
    //    Muruga 512 for 2633
    INFOBOOT                : origin = 0x1800, length = 0x200        
    //     Flash from __Boot_Start -( __Boot_SharedCallbacks or INT_VECTOR_TABLE)
    FLASH                   : origin = 0xFA00, length = 0x570
    //    Added by Muruga
    JTAGSIGNATURE           : origin = 0xFF80, length = 0x0004, fill = 0xFFFF
    BSLSIGNATURE            : origin = 0xFF84, length = 0x0004, fill = 0xFFFF
    //     Shared callbacks from __Boot_SharedCallbacks + Len (when used)
    BOOT_SHARED_CALLBACKS   : origin = 0xFF70, length = 8
    //     Boot vector Table from __Boot_VectorTable- __Boot_Reset
    INT_VECTOR_TABLE        : origin = 0xFF88, length = 0x76
    //     Boot reset from __Boot_Reset-__Flash_End
    RESET                   : origin = 0xFFFE, length = 0x0002
}

/****************************************************************************/
/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY                              */
/****************************************************************************/
SECTIONS
{
    .bss        : {} > RAM                /* GLOBAL & STATIC VARS              */
    .data       : {} > RAM                /* GLOBAL & STATIC VARS              */
    .sysmem     : {} > RAM                /* DYNAMIC MEMORY ALLOCATION AREA    */
    .stack      : {} > RAM (HIGH)         /* SOFTWARE SYSTEM STACK             */

    .text       : {} >> FLASH |INFOBOOT   /* CODE                 */
    .cinit      : {} >> FLASH |INFOBOOT   /* INITIALIZATION TABLES*/
    .const      : {} >> FLASH |INFOBOOT   /* CONSTANT DATA        */
    .cio        : {} > RAM                /* C I/O BUFFER                      */

    .BOOT_APP_VECTORS : {} > BOOT_SHARED_CALLBACKS
    /* MSP430 INTERRUPT VECTORS          */
    .BOOT_VECTOR_TABLE : {} > INT_VECTOR_TABLE
    .reset       : {}               > RESET  /* MSP430 RESET VECTOR         */
}

/****************************************************************************/
/* INCLUDE PERIPHERALS MEMORY MAP                                           */
/****************************************************************************/

-l MSP430FR2633.cmd

App Boot Loader

/* RAM Memory Addresses */
__RAM_Start = 0x2000;                                 /* RAM Start  */
__RAM_End = 0x2FFF;                                 /* RAM End  */
    /* RAM shared between App and Bootloader, must be reserved */
    PassWd = 0x2000;                                 /* Password sent by App to force boot  mode */
    StatCtrl = 0x2002;                                 /* Status and Control  byte used by Comm */
    CI_State_Machine = 0x2003;                         /*  State machine variable used by Comm */
    CI_Callback_ptr = 0x2004;                       /* Pointer to Comm callback structure */
    /* Unreserved RAM used for Bootloader or App purposes */
    _NonReserved_RAM_Start = 0x2006;                 /* Non-reserved RAM */

/* Flash memory addresses */
__Flash_Start = 0xC400;                             /* Start of Flash */
__Flash_End = 0xFFFF;                               /* End of Flash */
    /* Reserved Flash locations for Bootloader Area */
    __Boot_Start = 0xFA00;                             /* Boot flash */
    __Boot_Reset = 0xFFFE;                          /* Boot reset vector */
    __Boot_VectorTable = 0xFF88;                      /* Boot vector table */
    __Boot_SharedCallbacks_Len = 8;                 /* Length of shared callbacks (2 calls =4B(msp430) or 8B(msp430x) */
    __Boot_SharedCallbacks = 0xFF70;                 /* Start of Shared callbacks */
    _BOOT_APPVECTOR = __Boot_SharedCallbacks;       /* Definition for application table             */
    /* Reserved Flash locations for Application Area */
    _AppChecksum = (__Flash_Start);                 /* CRC16 of Application                         */
    _AppChecksum_8 = (__Flash_Start+2);             /* CRC8 of Application                          */
    _App_Start = (__Flash_Start+3);                 /* Application Area                             */
    _App_End = (__Boot_Start-1);                    /* End of application area (before boot)        */
    _CRC_Size = (_App_End - _App_Start +1);         /* Number of bytes calculated for CRC           */
    _App_Reset_Vector = (__Boot_Start-2);           /* FA00 -2 = F9FE Address of Application reset vector */
    _App_Proxy_Vector_Start = 0xF988;                 /* CHANGED TO ACCOMODATE 4 MORE VECTORS Proxy interrupt table */

/* MEMORY definition, adjust based on definitions above */
MEMORY
{
    SFR                     : origin = 0x0000, length = 0x0010
    PERIPHERALS_8BIT        : origin = 0x0010, length = 0x00F0
    PERIPHERALS_16BIT       : origin = 0x0100, length = 0x0100
    // RAM from _NonReserved_RAM_Start - __RAM_End
    // 4K RAM
    RAM                     : origin = 0x2006, length = 0xFFA
    // 512 bytes for FR2633
    INFOA                    : origin = 0x1800, length = 0x200
    // Flash from _App_Start -> (APP_PROXY_VECTORS-1)
    // 378D is changed to 357D .. as per calculation 0x5FE(1534 Bytes) is allocated to Boot Sector
    // Reduced Flash size to accomodate the additional interrupt vectors
    FRAM                       : origin = 0xC403, length = 0x357D
    //    Added
    JTAGSIGNATURE            : origin = 0xFF80, length = 0x0004, fill = 0xFFFF
    BSLSIGNATURE             : origin = 0xFF84, length = 0x0004, fill = 0xFFFF
    // Interrupt Proxy table from  _App_Proxy_Vector_Start->(RESET-1)
    INT00                    : origin = 0xF988, length = 0x0002
    INT01                    : origin = 0xF98A, length = 0x0002
    INT02                    : origin = 0xF98C, length = 0x0002
    INT03                    : origin = 0xF98E, length = 0x0002
    INT04                    : origin = 0xF990, length = 0x0002
    INT05                    : origin = 0xF992, length = 0x0002
    INT06                    : origin = 0xF994, length = 0x0002
    INT07                    : origin = 0xF996, length = 0x0002
    INT08                    : origin = 0xF998, length = 0x0002
    INT09                    : origin = 0xF99A, length = 0x0002
    INT10                    : origin = 0xF99C, length = 0x0002
    INT11                    : origin = 0xF99E, length = 0x0002
    INT12                    : origin = 0xF9A0, length = 0x0002
    INT13                    : origin = 0xF9A2, length = 0x0002
    INT14                    : origin = 0xF9A4, length = 0x0002
    INT15                    : origin = 0xF9A6, length = 0x0002
    INT16                    : origin = 0xF9A8, length = 0x0002
    INT17                    : origin = 0xF9AA, length = 0x0002
    INT18                    : origin = 0xF9AC, length = 0x0002
    INT19                    : origin = 0xF9AE, length = 0x0002
    INT20                    : origin = 0xF9B0, length = 0x0002
    INT21                    : origin = 0xF9B2, length = 0x0002
    INT22                    : origin = 0xF9B4, length = 0x0002
    INT23                    : origin = 0xF9B6, length = 0x0002
    INT24                    : origin = 0xF9B8, length = 0x0002
    INT25                    : origin = 0xF9BA, length = 0x0002
    INT26                    : origin = 0xF9BC, length = 0x0002
    INT27                    : origin = 0xF9BE, length = 0x0002
    INT28                    : origin = 0xF9C0, length = 0x0002
    INT29                    : origin = 0xF9C2, length = 0x0002
    INT30                    : origin = 0xF9C4, length = 0x0002
    INT31                    : origin = 0xF9C6, length = 0x0002
    INT32                    : origin = 0xF9C8, length = 0x0002
    INT33                    : origin = 0xF9CA, length = 0x0002
    INT34                    : origin = 0xF9CC, length = 0x0002
    INT35                    : origin = 0xF9CE, length = 0x0002
    INT36                    : origin = 0xF9D0, length = 0x0002
    INT37                    : origin = 0xF9D2, length = 0x0002
    INT38                    : origin = 0xF9D4, length = 0x0002
    INT39                    : origin = 0xF9D6, length = 0x0002
    INT40                    : origin = 0xFBD8, length = 0x0002            //    CAPTIVATE
    INT41                    : origin = 0xFBDA, length = 0x0002            //    P2
    INT42                    : origin = 0xFBDC, length = 0x0002            //    P1
    INT43                    : origin = 0xFBDE, length = 0x0002            //    ADC
    INT44                    : origin = 0xFBE0, length = 0x0002            //    USCI_B0
    INT45                    : origin = 0xFBE2, length = 0x0002            //    USCI_A1
    INT46                    : origin = 0xFBE4, length = 0x0002            //    USCI_A0
    INT47                    : origin = 0xFBE6, length = 0x0002            //    WDT
    INT48                    : origin = 0xFBE8, length = 0x0002            //    RTC
    INT49                    : origin = 0xFBEA, length = 0x0002            //    TIMER3_A1
    INT50                    : origin = 0xFBEC, length = 0x0002            //    TIMER3_A0
    INT51                    : origin = 0xFBEE, length = 0x0002            //    TIMER2_A1
    INT52                    : origin = 0xFBF0, length = 0x0002            //    TIMER2_A0
    INT53                    : origin = 0xFBF2, length = 0x0002            //    TIMER1_A1
    INT54                    : origin = 0xFBF4, length = 0x0002            //    TIMER1_A0
    INT55                    : origin = 0xFBF6, length = 0x0002            //    TIMER0_A1
    INT56                    : origin = 0xFBF8, length = 0x0002            //    TIMER0_A0
    INT57                    : origin = 0xFBFA, length = 0x0002            //    USNMI
    INT58                    : origin = 0xFBFC, length = 0x0002            //    SYSNMI
    // App reset from _App_Reset_Vector
    RESET                   : origin = 0xF9FE, length = 0x0002
}

/****************************************************************************/
/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY                              */
/****************************************************************************/

SECTIONS
{
  GROUP(ALL_FRAM)
    {
       GROUP(READ_WRITE_MEMORY)
       {
          .TI.persistent : {}                /* For #pragma persistent            */
       }

       GROUP(READ_ONLY_MEMORY)
       {
          .cinit      : {}                   /* Initialization tables             */
          .pinit      : {}                   /* C++ constructor tables            */
          .binit      : {}                   /* Boot-time Initialization tables   */
          .init_array : {}                   /* C++ constructor tables            */
          .mspabi.exidx : {}                 /* C++ constructor tables            */
          .mspabi.extab : {}                 /* C++ constructor tables            */
          .const      : {}                   /* Constant data                     */
       }

       GROUP(EXECUTABLE_MEMORY)
       {
          .text       : {}                   /* Code                              */
       }
    } > FRAM

#ifdef __TI_COMPILER_VERSION__
  #if __TI_COMPILER_VERSION__ >= 15009000
    #ifndef __LARGE_DATA_MODEL__
    .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT)
    #else
    .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT)
    #endif
  #endif
#endif

    .jtagsignature : {} > JTAGSIGNATURE   /* JTAG Signature                    */
    .bslsignature  : {} > BSLSIGNATURE    /* BSL Signature                     */


    .bss        : {} > RAM                /* Global & static vars              */
    .data       : {} > RAM                /* Global & static vars              */
    .TI.noinit  : {} > RAM                /* For #pragma noinit                */
    .cio        : {} > RAM                /* C I/O buffer                      */
    .sysmem     : {} > RAM                /* Dynamic memory allocation area    */
    .stack      : {} > RAM (HIGH)         /* Software system stack             */

    .infoA     : {} > INFOA              /* MSP430 INFO FRAM  Memory segments */

       /* MSP430 INTERRUPT VECTORS          */
    .int00       : {}               > INT00
    .int01       : {}               > INT01
    .int02       : {}               > INT02
    .int03       : {}               > INT03
    .int04       : {}               > INT04
    .int05       : {}               > INT05
    .int06       : {}               > INT06
    .int07       : {}               > INT07
    .int08       : {}               > INT08
    .int09       : {}               > INT09
    .int10       : {}               > INT10
    .int11       : {}               > INT11
    .int12       : {}               > INT12
    .int13       : {}               > INT13
    .int14       : {}               > INT14
    .int15       : {}               > INT15
    .int16       : {}               > INT16
    .int17       : {}               > INT17
    .int18       : {}               > INT18
    .int19       : {}               > INT19
    .int20       : {}               > INT20
    .int21       : {}               > INT21
    .int22       : {}               > INT22
    .int23       : {}               > INT23
    .int24       : {}               > INT24
    .int25       : {}               > INT25
    .int26       : {}               > INT26
    .int27       : {}               > INT27
    .int28       : {}               > INT28
    .int29       : {}               > INT29
    .int30       : {}               > INT30
    .int31       : {}               > INT31
    .int32       : {}               > INT32
    .int33       : {}               > INT33
    .int34       : {}               > INT34
    .int35       : {}               > INT35
    .int36       : {}               > INT36
    .int37       : {}               > INT37
    .int38       : {}               > INT38
    .int39       : {}               > INT39
    CAPTIVATE    : { * ( .int40 ) } > INT40 type = VECT_INIT
    PORT2        : { * ( .int41 ) } > INT41 type = VECT_INIT
    PORT1        : { * ( .int42 ) } > INT42 type = VECT_INIT
    ADC          : { * ( .int43 ) } > INT43 type = VECT_INIT
    USCI_B0      : { * ( .int44 ) } > INT44 type = VECT_INIT
    USCI_A1      : { * ( .int45 ) } > INT45 type = VECT_INIT
    USCI_A0      : { * ( .int46 ) } > INT46 type = VECT_INIT
    WDT          : { * ( .int47 ) } > INT47 type = VECT_INIT
    RTC          : { * ( .int48 ) } > INT48 type = VECT_INIT
    TIMER3_A1    : { * ( .int49 ) } > INT49 type = VECT_INIT
    TIMER3_A0    : { * ( .int50 ) } > INT50 type = VECT_INIT
    TIMER2_A1    : { * ( .int51 ) } > INT51 type = VECT_INIT
    TIMER2_A0    : { * ( .int52 ) } > INT52 type = VECT_INIT
    TIMER1_A1    : { * ( .int53 ) } > INT53 type = VECT_INIT
    TIMER1_A0    : { * ( .int54 ) } > INT54 type = VECT_INIT
    TIMER0_A1    : { * ( .int55 ) } > INT55 type = VECT_INIT
    TIMER0_A0    : { * ( .int56 ) } > INT56 type = VECT_INIT
    UNMI         : { * ( .int57 ) } > INT57 type = VECT_INIT
    SYSNMI       : { * ( .int58 ) } > INT58 type = VECT_INIT
    .reset       : {}               > RESET
    /* MSP430 RESET VECTOR                 */
}

/****************************************************************************/
/* INCLUDE PERIPHERALS MEMORY MAP                                           */
/****************************************************************************/

-l MSP430FR2633.cmd

  • 0
    TI__Guru**** 219637 points
    Hi Murugavelu,

    There is a bootloader already available on the MSP430FR2633 that supports UART and I2C interfaces, you should not be using a custom main-memory bootloader unless the default ROM version is insufficient for your needs. You should then be following the MSP430FRBoot examples as a guide. The linkerGen utility is able to generate the necessary linker files for your needs. Callbacks are required if you plan on using the bus for both UART communication and BSL commands, there is no issue with placing them before the signatures with space in between.

    Regards,
    Ryan
  • 0 in reply to Ryan Brown1
    Intellectual 405 points
    Hi Ryan,

    We did try to generate the linkerscript using the LinkerGen available and that is how we bricked the controller, basically the memory allocation for the JTAGSIGNATURE , BSLSIGNATURE was missing on analysis of the Linkerscripts. Hence we took the generated and combined the linkerscripts as custom one. We would like to know if it is correctly modified. We have verified all the parameters as per the generated one. The clarification we wanted is on the below parameters. Since this modified to accomodate JTAGSignature and BSLSignature, is the below lines correct for MSP430FR2633. Should the length be 4 or 8 for FR2633.

    __Boot_SharedCallbacks_Len = 8; /* Length of shared callbacks (2 calls =4B(msp430) or 8B(msp430x) */
    __Boot_SharedCallbacks = 0xFF70; /* Start of Shared callbacks */

    We could not use the inbuild BSL as we are doing OTA on RS485, hence need more control over the UART driver. We would be glad if the current BSL Firmware could be shared for us to modify the required parameters in the driver.

    Regards,
    Muruga
  • 0 in reply to Murugavelu Thangavelu1
    TI__Guru**** 219637 points
    Hello Muruga,

    I've already explained that the callback length depends on the number of callbacks you initialize for the shared communication peripheral, which you have not yet shared. But since it appears that you are using the peripheral only for BSL and not jointly with UART communication then this is not a concern. Furthermore, it doesn't matter if you use 4 or 8 since the signatures do not occur until 0xFF80 and in-between is empty space. You will need to further debug the system and provide more details on how the device is bricked. The ROM BSL cannot be modified and is not provided by TI.

    Regards,
    Ryan
  • 0 in reply to Ryan Brown1
    Intellectual 405 points
    Hi Ryan,

    Thank you for the inputs.

    Have few more clarification of the Custom BSL

    We are referring to the document SLAU610C, as per the document the UART BSL Command is
    Header (1 Byte) Length (2 Bytes) BSL Core Command (1 Byte) Checksum (2 Bytes)

    The example MSPBoot firmware for BSL available from TI - MSPBoot_1_01_00_00 is not matching to the above command format specifically to the length, the length is set to 1 in the bootloader firmware. The MSP430BSL_1_00_12_00 matches to the command format as described in the document. We have configured MSPBoot_1_01_00_00 as BSL and all the core commands are matching.

    Confused, should we be using the MSP430BSL_1_00_12_00 files if we need to use Win_Scripter application for firmware update.

    We are working to get a main memory bootloader due to few constrains.

    Regards,
    Muruga
  • 0 in reply to Murugavelu Thangavelu1
    Intellectual 405 points
    Hi Ryan,

    My mistake, SLAU610C is wrong reference. Referring to SLAA600b. Am able to get a response from the bootloader for all command simulated.

    Testing the Erase function, having some trouble should be resolve it.

    Thank you

    With Regards,
    Muruga
  • 0 in reply to Murugavelu Thangavelu1
    TI__Guru**** 219637 points
    Muruga,

    I would assume that you would be referring to SLAA721 (MSP430FRBoot) resources for the MSP430FR2633, but either declare a command packet length of 1. MSP430BSL_1_00_12_00 is the Custom-BSL430 package with F5xx/F6xx/G2xx flash BSL sources/images and is unrelated to MSP(FR)Boot. The BSL-SCRIPTER is intended for factory ROM BSL communication and therefore you should model your custom programmer solution on the host examples provided with the MSP430FRBoot code package.

    Regards,
    Ryan
  • 0 in reply to Ryan Brown1
    Intellectual 405 points
    Thank you Ryan for the Input

    Have resolved all the errors and was able to combine the TI_TXT files into one using TI-TXT Parser and test it with the a sample application (LED Blinking)

    We tried the same with the actual application of 13k, but it is not working. we suspect the Interrupt vector as the application is using all the interrupts where as the sample application did not have any interrupt, majorly we are using captivate for all functionality. We are adding an interrupt routine to the sample application to confirm; your thought would be helpful.

    Regards,
    Muruga
  • 0 in reply to Murugavelu Thangavelu1
    TI__Guru**** 219637 points
    It's good to hear that you've made progress by the success of a simple blink LED program. You should read out your memory contents after programming through the main memory bootloader to confirm that all application code, including interrupt and reset vectors, has been properly stored.

    Regards,
    Ryan
  • 0 in reply to Ryan Brown1
    Intellectual 405 points
    Ryan,

    We debugged and found the issue to be related to interrupt or interrupt vector definition. The definition is as per the sample code for both bootloader and application.

    The observation is as soon as the first interrupt is enabled the controller hangs. Since we cannot debug had prints on UART as shown below. If the print statement is moved after the Interrupt enabling, there is no print. Also added a print in the interrupt routine which is not printed.

    Kindly let us know how to resolve the issue.

    Timer Configuration
    TA2CTL |= TASSEL__SMCLK; // SMCLK
    sendTestText("Timer Configured & Started");
    TA2CTL |= MC__UP|TAIE;

    Interrupt Routine
    TA2CTL &= ~(TAIE); // Disable Timer Interrupt
    sendTestText("Entered Timer Interrupt");
    counter++;

    With Regards,
    Muruga
  • 0 in reply to Murugavelu Thangavelu1
    TI__Guru**** 219637 points
    Check to see if 0xFFEE (TA2IFG interrupt vector) is being loaded with the proper interrupt address, both by the applications converted TXT to C file and after bootloading. The issue could have to do with the host programmer. Have you tested this application as a standalone program? I'm not confident that the UART printer will work in the main memory bootloader.

    Regards,
    Ryan
  • 0 in reply to Ryan Brown1
    Intellectual 405 points
    Hi Ryan,

    The Application is tested extensively as a standalone program.

    Shouldn't the application interrupt vector point to the proxy interrupt vector location as defined in the Linker file. As the sample bootloader application_1 the interrupt vector used is proxy location and the bootloader use the actual interrupt vector. Shouldn't the application also point to the standard vector table as it is hardwired in the architecture. In that case what is purpose of defining a proxy vector table.
    Currently the application with the modified linker the interrupt points to the proxy interrupt vector, guess it is because of it the interrupts are not working rather hangs.

    Could you kindly let us know we could correct this. We followed the application and bootloader as provided.

    Would also want to know if there is place where we could upload the file for other users once this is resolved.

    Regards,
    Muruga
  • 0 in reply to Murugavelu Thangavelu1
    TI__Guru**** 219637 points
    Hi Muruga,

    The idea of proxy interrupt vectors is a nomenclature artifact of MSPBoot that is not actually used, this will be fixed in future revisions of MSP430FRBoot. The minimum size for a Flash erase is a segment, which is 512 bytes in MSP430 microcontrollers. Given this consideration, the whole interrupt table is protected from erases. To allow interrupts on an application level, a software vector redirection method is implemented to fix the contents of the default vector table and point to a Proxy table that resides in application space.

    FRAM does not have the limitation of a minimum erase size, so all interrupts can be reprogrammed in FRAM devices without risking erasure of the reset vector. FR5xx/6xx devices enable protection of the bootloader area using MPU (disabled while reprogramming interrupt vectors), but this feature is not available on the MSP430FR2xx/4xx. What you will have to do instead is turn off the PFWP bit of SYSCFG0 before copying the interrupt table (and re-enable afterwards), code you should have experience with since you've already successfully created a bootloader application minus interrupts. This should be done in the TI_MSPBoot_MI_WriteByteDirect function of the TI_MSPBoot_MI_FRAM file.

    Regards,
    Ryan

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