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CCS/MSP430FR5969: Questions about LPM

Mirae Kim
Intellectual 450 points
Part Number: MSP430FR5969

Tool/software: Code Composer Studio

Hello.

I was looking at MSP430FR5969 document (SLAS704E). 

I could see that there are different operating mode exist in MSP430FR5969 device. 

I have some things I was curious about.

1. what are the examples of High frequency peripherals and Low frequency peripherals

    There is some example about 'Unclocked peripherals'but I could not find the information about 'high and low frequency peripherals'.

2. There is a section about Full retention.

    I can see that only LPM3.5 and LPM4.5 is not supporting full retention. 

    Does it mean that I do not have to save CPU state, peripheral state, RAM contents, and register content to FRAM on LPM0~ LPM4? 

    Is it right that I have to save those features only on LPMx.5 mode? 

------------------------------------------------------------------------------------------------

This questions are related with Question 1. 

In section 6.3.1 Peripherals in LPM3 and LPM4, 

I could see the information about peripheral groups

I would like to know if I understand correctly. 

3. Is Group A available only in LPM3 and Is Group B available in both LPM3 and LPM4?

4. Are Group A and Group B distinguished by frequency? 

Best, 

Mirae

  • 0
    TI__Guru**** 217467 points
    Hello Mirae,

    1. Any peripherals sourced by SMCLK are high-frequency, those sourced by ACLK are low-frequency. Please refer to Table 6-2 of SLAS704F.
    2. This means that RAM and peripheral registers are not retained during LPMx.5 and must be restored after waking up (exit event). Please refer to the LPMx.5 code examples to see how this is detected and carried out.
    3&4. All timers, eUSCIs, and the ADC12 can either be clocked by SMCLK (high-frequency) or ACLK (low-frequency) which determines what LPM can be used. COMP_E and REF_A are unclocked peripherals.

    Regards,
    Ryan
  • 0 in reply to Ryan Brown1
    Intellectual 450 points

    Hello,
    Thank you for your reply.
    I have one more thing to ask which is about LPM typical wakeup time.

    1. Typical wake-up time is written in Table 6-1 operating mode.
    I wonder if this consists peripheral register and RAM data recovery time for LPM 4.5 and LPM 3.5.

    2. About 'Typical current consumption',

       Does 'Typical current consumption' have the same value at each LPM mode wake-up event occur?

    3. Is there any documents about low power mode entering time (overhead of saving RAM data to FRAM) ?


    Best,
    Mirae

  • 0 in reply to Mirae Kim
    TI__Guru**** 217467 points
    Hello Mirae,

    1. Wake-up time is documented in Table 5-9 and is measured from the edge of an external wake-up signal (for example, port interrupt or wake-up event) until the first instruction of the user program is executed. This does not include peripheral register and RAM restoration, which must be done manually upon wake up.

    2. Wake-up charge is documented in Table 5-10 and varies based on the LPM being exited.

    3. LPMs are entered immediately upon instruction, the application should manually backup RAM memory before entering LPMx.5.

    Regards,
    Ryan

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