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CCS/MSP432P401R: CCS?MSP432P401R

vinod naidu
Prodigy 210 points

Part Number: MSP432P401R
Other Parts Discussed in Thread: ADS1292R

Tool/software: Code Composer Studio

hi ti,  I currently working with SPI protocol in MSP432 dev board with ADS1292r ECG board 

I am using Register level SPI examples to communicate with ADS1292r board, in many of SPI examples sketches source clock is ACLK  ( EUSCI_B0_SEL__ACLK ) 

which is giving 33 K Hz of Clock speed but when I changed the clock source SMCLK ( EUSCI_B0__SEL__SMCLK)  in control register settings, it suppose to give 3 M Hz of frequency clock 

but i couldn't able to see any clock signals on my oscilloscope ? can any give suggestion how to configure SPI clock to get 3 or 1 M Hz 

 

  • 0
    TI__Mastermind 41660 points

    Vinod,


    I'd like to help. Can you share your code?

  • 0 in reply to Evan W
    Prodigy 210 points

    a function initiate the spi   register  level example

    i have made changes in in function as

    EUSCI_B_CTLW0_SSEL__ACLK  to EUSCI_B_CTLW0_SSEL__SMCLK

    void SPI_inti()
    {
        P1->SEL0 |= BIT4 | BIT5 | BIT6 | BIT7;  // set 4-SPI pin as second function

        EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_SWRST; // Put state machine in reset

        EUSCI_B0->CTLW0 = EUSCI_B_CTLW0_SWRST | // Remain in reset state
                EUSCI_B_CTLW0_MST |             // SPI master
                EUSCI_B_CTLW0_SYNC |            // Synchronous mode
                EUSCI_B_CTLW0_CKPH |            // Clock polarity high
                EUSCI_B_CTLW0_MSB |             // MSB first
                EUSCI_B_CTLW0_MODE_1 |          // 4-pin mode
                EUSCI_B_CTLW0_STEM |            // STE mode select
                EUSCI_B_CTLW0_SSEL__ACLK;       // ACLK                                 /* changed EUSCI_B_CTLW0_SSEL__SMCLK;    SMCLK     */
      
        EUSCI_B0->BRW = 0x00;                   // /2,fBitClock = fBRCLK/(UCBRx+1).  master clock is 3MHz/(BW)
        EUSCI_B0->CTLW0 &= ~EUSCI_B_CTLW0_SWRST;// **Initialize USCI state machine**
    }

  • 0 in reply to vinod naidu
    TI__Mastermind 41660 points
    Vinod,

    Had you initialized what you wanted to source SMCLK? Can you show me the code for your clock settings around setting up your SMCLK clock source? What is your MCLK source and frequency?

    dev.ti.com/.../

    This, and other CS code examples are good examples on leveraging the clock system in the manner you wish.

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