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MSP432P401R: Considerations when 1.8V power supply is used with on-chip DC/DC regulator

Part Number: MSP432P401R

Champs,

I am asking this for our customer.

In this design, low power consumption is required.

1) When 1.8V battery power supply is used for MSP432P401 with on-chip DC/DC regulator, is there any special considerations we should pay attention to?

2) If JTAG debugger MSP-FET + adapter MSP-FET-432ADPTR is used, should we add level shifters between 3.3V and 1.8V?

In P15 of http://www.ti.com/lit/ug/slau647i/slau647i.pdf, it says "Software configurable supply voltage between 1.8 V and 3.6 V at 100 mA".

What does that mean by software configurable? Does it mean CCS?

3) If we wire XDS110 from MSP432 LP "msp-exp432p401r", should we add level shifters between 3.3V and 1.8V?

4) In P55 of MSP432P401R datasheet (slas826f.pdf), table 5-19 says "Peak current drawn by DC-DC from DVCC is MAX 300 mA".

Does that mean an external 1.8V LDO or DC/DC output should supply up to 300mA if MSP432P401 on-chip DC/DC is used?

Wayne

  • Wayne,

       I will need to reach out to the team for some of the implications of the specification.

    (1) The DC-DC is intended to improve efficiency, and is most efficient when Vdd is higher and the load currents are higher.  There is a delay associated with starting up the DC-DC as well as moving to-from deep sleep requires moving to the LDO first (see figure 7.5.3 of the TRM, SLAU356f).

    (2) Level shifters are not required and the control is provided through the IDE.  See attached example for CCS.

    (3) The XDS110 only provides the 3.3 and would need level shifters if the target was at 1.8V.

    (4) I do not believe that was the intent of that specification.  It is a peak-current while tables like 5.11 show typical active current in the 1-5mA range depending upon the speed.

    Regards,

    Chris

  • Wayne,

       The DC-DC will not work below 2.0V.  Please refer to and Table 5-19 in the datasheet.  

    Regards,

    Chris

  • Chris,

    Thank you.

    Wayne

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