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MSP430F5529: Any tricks for 16bit SPI framing + DMA

Part Number: MSP430F5529

Hi,

We need to drive a 16bit SPI DAC from MSP430F5529. The key for the DAC is that the nCS line needs to be de-aserted every 2 bytes for the DAC to update.

Problem with this design is we need to make use of a DMA SPI transfer for timing of data to the DAC, and as MSP430F5529 only supports 8 bit transfers, we seem to be stuck.

We have tried using software methods to support the DAC framing requirements, but the timing requirements for the output from the DAC make this difficult to do successfully.

Does anyone have a solution or novel hack that might work in this instance?  

Thanks.

Stomp!

  • Hi Stomp,

    I do not think you are going to be capable of using 4-wire SPI to control the CS pin in this application, you must instead use 3-wire mode and control CS through a GPIO. You can set CS manually before triggering one DMA channel to transfer two bytes, after which you would reset CS in the DMA ISR. If there is too much latency involved then you could use a second DMA channel which triggers from completion of the first to automatically reset CS through PxOUT control, or you could do this in reverse (single DMA transfer to set CS pin then triggers second DMA for 16-bit SPI transfer, afterwards the DMA ISR resets CS). A combination of all three could be considered as well (3 DMA channels total) but I've never tried this so everything discussed is theoretical.

    Regards,
    Ryan
  • Hi,

    Thanks very much for your suggestions.

    I've just used the DMA ISR to trigger after two bytes, and immediately queue up the next transfer. This works well.

    Best Regards,
    Stomp!

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