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Timer UP Mode PWM (fwiw)

Jeff Tenney
Guru 12160 points

For what it's worth -

I just learned that if the Timer is in UP mode, the following output modes have a surprising little characteristic:

  toggle/reset (2)
  set/reset    (3)
  toggle/set   (6)
  reset/set    (7)

Instead of the secondary action (after the "/") occurring when the counter reaches the CCR0 value, the action occurs when the counter wraps back to zero.  It's one clock tick later than I would have expected.  Also many PWM threads on this forum have it wrong, too.

In other words, the following configuration generates ACLK / 2, even though it may appear to set and reset the output at the same time:

  TA0CCTL1 = OUTMOD_3;  // set/reset mode
  TA0CCR1 = 1;          // set OUT when TA0 counts to 1 (0->1)
  TA0CCR0 = 1;          // reset OUT when TA0 wraps back to 0 (1->0)

  TA0CTL = TASSEL__ACLK | MC__UP | TACLR;

In the User's Guides, the summary description in "Table X-Y, Output Modes" does not describe this nuance.  However, text in the "Output Example" for Up Mode describes the true behavior.

In most cases, any "error" is tiny because 1 little count hardly affects the PWM duty cycle at all.  But in other applications, this potential error matters.  For what it's worth.

Jeff

  • Guru 227245 points

    This is what I always thought how it works (maybe because I read this text in the example too) until someone in this forum pointed me to the users guide description telling me that it isn't. I never had the need to check anyway.

    I always expected that the second action takes place when the tiemr counts to zero. Because if the timer does not run in up mode, connecting the action with the ccr0 value makes no sense.
    The description of the output modes, together with the guide note about these output modes being useless in up mode, formed the impression that indeed the action is related to CCR0 event rather than to TAR->0. Whcih does not seem to make a difference in up mode since TAR is reset at CCR0.

    Yet a close look at the up mode workings reveals that TAR is not reset immediately at CCR0. The simulated 'overflow' happens one timer tick later. So CCR0 is a valid TAR value, synchroneously followed by 0. So there is a difference and maybe when writing the description later, this difference was 'lost in translation'.

    On the bottom line, the double-action output modes are not as useless for CCR0 as described in the users guide. The CCR0 output can still serve as a trigger signal, as it generates a pulse of one timer tick in these modes (unless CCR0=0, then I don't know what happens)

  • in reply to Jens-Michael Gross
    Guru 12160 points

    Very cool JMG, I hadn't considered the impact on using one of these output modes with CCR0.  It can produce a trigger signal, or it can provide a reference of the minimum or maximum PWM duty cycle for the selected frequency  -- both useful features from an output I had previously considered useless.

    I guess the more I look at this, the more I think that the manual should probably make it more clear that the double-action output modes have different compare behavior when the counter is in UP mode versus the other counting modes.  One triggers counting to CCR0, and the other triggers counting to zero after CCR0.

     

     

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