MSP430F5659: UCS Settings for MCLK = 20MHZ, USB and BSL

Hi,

I need to clock a MSP430F5659 device for max performance.  Per a previous post relating to USB I discovered the MSP430F5659 is limited to 20 MHz.

With XT2 being a 24 MHz crystal, we cannot achieve 20 MHz MCLK due to the FLL divider settings (non integer value of 0.8333)

With XT2 being a 4 MHz crystal, we cannot achieve 20MHZ because 20/4 = 5 and the DIV options are 1,2,4,8,12,16.

With XT2 NOT being 4, 8, 12 or 24 MHz we cannot make use of the automatic XT2 detection in the MSP430 BSL.

My question is what value of XT2 will allow me to have a 20 MHz MCLK, 48 MHz USB PLL and use the MSP430 BSL auto-XT2 detection?

Any suggestions?

Thanks

Stomp!