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MSP430FR2032: ACLK from VLO - Supported or Not? Driverlib write Reserved? Bit

Part Number: MSP430FR2032

The MSPFR4xxx_FR2xxx Family User Guide ( SLAU445G ) documents CSCTL4 bit 9 as read-only Bit.

The "MSP430FR2xx_4xx" DriverLib´s cs.c implementation of CS_initClockSignal clearly write 1 into it if called with CS_ACLK, CS_VLOCLK_SELECT.

In addition to this: it doens clear the Bit if called with one of the other sources since " &= ~(SELA);" only masks CSCTL4 bit 8.

So: Does this chip family actually support CSCTL4  Bit 9 or is this just an undiscovered Bug in the DriverLib?

  • PS: this is the DriverLibs Source code in question:

    void CS_initClockSignal(uint8_t selectedClockSignal,
                            uint16_t clockSource,
                            uint16_t clockSourceDivider)
    {
        uint16_t temp;
        switch(selectedClockSignal)
        {
        case CS_ACLK:
    
            HWREG16(CS_BASE + OFS_CSCTL4) &= ~(SELA);
    
            if(clockSource == CS_XT1CLK_SELECT)
            {
                clockSource = 0x0;
            }
            else if(clockSource == CS_REFOCLK_SELECT)
            {
                clockSource = 0x1;
            }
            else if(clockSource == CS_VLOCLK_SELECT)
            {
                clockSource = 0x2;
            }
            clockSource = clockSource << 8;
    
            HWREG16(CS_BASE + OFS_CSCTL4) |= (clockSource);
    

  • The VLO is not a valid clock source for ACLK; this parameter combination is not allowed. For XT1/REFO, this functions work correctly.

    This function did not mention CS_VLOCLK_SELECT in this place in version 2.80; it appears that the entry "Made some changes internally to MSP430FR2xx_4xx/initFLL function series to be more coherent (no functional change)" in the revision history is only technically correct.

  • This is what i thought as well (based on the datasheets) until i read the DriverLibs Imlementation.

    As the DriverLib is not supposed to write reserved bits (imho) i still want to have an answer from TI whether this is a Bug in the Driverlib or the BIT 9 just got not documented correctly.
  • The answer is neither DriverLib bug. Some MSP430FR4xx/FR2xx devices support ACLK sourcing through VLO with selection of bits 8 & 9 in CSCTL4, however this is not an option for the MSP430FR2xx/4xx. Driverlib would either need to use #defines to differentiate between device variants or attempt to write a read-only bit. The latter was intentionally chosen for code simplicity as it does not affect operation, therefore Currently, using CS_VLOCLK_SELECT will set the ACLK source to REFO.

    Edit: Revised answer

    Regards,
    Ryan

  • So these "Some MSP430FR4xx/FR2xx devices" do then have another "MSPFR4xxx_FR2xxx Family User Guide ( SLAU445G )" ? 8-/
  • Ah, my mistake. The Driverlib cs.c source code inclusion of VLOCLK must have been a copy-and-paste error from a different device family. I will submit a software bug report so that this issue is resolved in later DriverLib versions.

    Regards,
    Ryan

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