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CCS/MSP430F5438A: Configuring watchdog timer

Part Number: MSP430F5438A

Tool/software: Code Composer Studio

In the defines of the msp4305438a.h, it says

#define WDT_ADLY_1000 (WDTPW+WDTTMSEL+WDTCNTCL+WDTIS2+WDTSSEL0)

I'm looking at this table

If I look at this: (WDTPW+WDTTMSEL+WDTCNTCL+WDTIS2+WDTSSEL0)

If I look at WDTTMSEL, it says in the table 0b is watchdog mode and 1b is interval timer. What mode is WDTTMSEL in without any numbers at the end? Is it just default in watchdog mode and to put it in interval mode it would be WDTTMSEL1?

Again, what is the action of WDTCNTCL? Is it just default 0b and there's "no action"?

WDTIS2 means it's set at "100b = Watchdog clock source /(215) (1 s at 32.768 kHz)"? because the 2 at the end means bit2 yes? but what if I wanted to set it as 111b = Watchdog clock source /(26 ) (1.95 ms at 32.768 kHz)? what number would i put at the end?

Also, if I look at WDTSSEL, if I want to set it as ACLK, do I put WDTSSEL5 since it's bit 5?

  • I encourage you to pick one of these symbols (WDTIS2, e.g.) and follow it into msp430f5438a.h ("Open Declaration"). These symbols are grouped together, which will allow you to discern the convention:

    1) Single-bit fields (e.g. WDTHOLD) are named as in the Book. There is no definition for a setting of 0.
    2) Multi-bit fields (e.g. WDTIS) have a name for each bit (e.g. WDTIS2). These are usually cumbersome to use, so:
    3) In most cases, multi-bit fields include a collection of multi-bit definitions for numerical assignments, using an underbar (_), e.g. WDTIS_2 means the field WDTIS==2.
    4) In some cases, mnemonics are provided with a double underbar (__), e.g. WDTIS__8192K is the same as WDTIS_2.

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