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Generate an interrupt

Other Parts Discussed in Thread: MSP430F1611

Hi,

I am new to MSP430F1611. I am trying to generate an interrupt every 2ms. I am using SMCLK at 125kHz and in continuous mode.

Kindly suggest the way to implement it.

I tried this:

WDTCTL  = WDTPW + WDHOLD;

TACTL = TASSEL_2 + TACLR;

CCTL0 = CCIE;

CCR0 = ?

P1DIR |= 0X00;

TACTL |= ID_0;

TACTL |= MC_2;

 

How to calculate CCR0?

Thanks,

Ishika

 

 

  • Hi Ishika,

     

    The CCR0 can be calculated as follows:

    CCRx = target_time[s] * (clock_freq[Hz] / clock_div)

     

    For your example above with the target time of 2ms, the clock source of 125kHz and clock divider of 1 the CCR0 target would be 250.

    With a static CCR0 value in the mode you have selected above I think you would only see an interrupt approx every 524ms as in continuous mode the timer keeps counting up to 0xFFFF rather than resetting when hitting the CCR0 value.  If you have to use the timer in continuous mode then the CCR0 will have to be updated (increased by 250) each time in order to trigger again 2ms later.  I would suggest you use Up mode (MC_1) and set TACCR0 = 249 (in up mode the counter period is actually CCR0+1 due to the extra count for stepping to zero).

     

    Regards,

    Chris.

  • chris_m said:
    CCRx = target_time[s] * (clock_freq[Hz] / clock_div)

    The formula is mostly correct - I would add a -1 to it so it already compensates for the additional overflow tick mentioned later in the text.

    Alternatively, you can run the timer in cont mode and increase the CCR0 value by 250 on each interrupt inside the ISR.
    This allows the use of the other CCRx units for different timings or for capturing jobs.
    It also allows for detecting missed interrupts (due to periods with disabled interrupts): Check whether the difference between TAR and CCR0 is <250 and if not, you missed an interrupt, need to add another 250 to CCR0 and perhaps do what you need to do inside the ISR one more time (like incremeting a time counter variable). This way you will detect any period of disabled interrupts up to one timerA overflow.

    Using this approach, you won't be able to use the other CCRx registers for PWM output, so which way to go depends on the intended uses.

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