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CCS/MSP432P401R: ADC+DMA Example code

Part Number: MSP432P401R

Tool/software: Code Composer Studio

 Hii all, 

         in my application, I m doing averaging of 2048 samples of ADC  for that I want to use DMA . So, I tried some code but that codes are not working properly .  Now I m working on a code in which DMA buffer is updating only ones. so please help me regarding this , and if possible then send me any code of DMA without diriverlib.h .

my code is given below;

#include "msp.h"
#include <driverlib.h>
#include <stdint.h>
#include <stdbool.h>
#include <stdio.h>

// Buffer specs
#define SAMPLE_LENGTH 1024
int16_t data_array1[SAMPLE_LENGTH];
int16_t data_array2[SAMPLE_LENGTH];

//volatile arm_status status;
#define SMCLK_FREQUENCY 48000000
#define SAMPLE_FREQUENCY 8000

/* DMA Control Table */
#ifdef ewarm
#pragma data_alignment=256
#else
#pragma DATA_ALIGN(controlTable, 256)
#endif
uint8_t controlTable[256];

volatile int switch_data = 0;
uint32_t color = 0;

/* Timer_A PWM Configuration Parameter */
Timer_A_PWMConfig pwmConfig =
{
TIMER_A_CLOCKSOURCE_SMCLK,
TIMER_A_CLOCKSOURCE_DIVIDER_1,
(SMCLK_FREQUENCY/SAMPLE_FREQUENCY),
TIMER_A_CAPTURECOMPARE_REGISTER_1,
TIMER_A_OUTPUTMODE_SET_RESET,
(SMCLK_FREQUENCY/SAMPLE_FREQUENCY)/2
};

void main(void)
{
/* Halting WDT and disabling master interrupts */
MAP_WDT_A_holdTimer();
MAP_Interrupt_disableMaster();
P1->DIR |= 0xff;

/* Set the core voltage level to VCORE1 */
MAP_PCM_setCoreVoltageLevel(PCM_VCORE1);

/* Set 2 flash wait states for Flash bank 0 and 1*/
MAP_FlashCtl_setWaitState(FLASH_BANK0, 2);
MAP_FlashCtl_setWaitState(FLASH_BANK1, 2);

/* Initializes Clock System */
MAP_CS_setDCOCenteredFrequency(CS_DCO_FREQUENCY_48);
MAP_CS_initClockSignal(CS_MCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
MAP_CS_initClockSignal(CS_HSMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
MAP_CS_initClockSignal(CS_SMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
MAP_CS_initClockSignal(CS_ACLK, CS_REFOCLK_SELECT, CS_CLOCK_DIVIDER_1 );

/* Configuring Timer_A to have a period of approximately 500ms and
* an initial duty cycle of 10% of that (3200 ticks) */
MAP_Timer_A_generatePWM(TIMER_A0_BASE, &pwmConfig);

/* Initializing ADC (MCLK/1/1) */
MAP_ADC14_enableModule();
MAP_ADC14_initModule(ADC_CLOCKSOURCE_MCLK, ADC_PREDIVIDER_1, ADC_DIVIDER_1, 0);

MAP_ADC14_setSampleHoldTrigger(ADC_TRIGGER_SOURCE1, false);

/* Configuring GPIOs (5.5 A0) */
MAP_GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P5, GPIO_PIN5, GPIO_TERTIARY_MODULE_FUNCTION);

/* Configuring ADC Memory */
MAP_ADC14_configureSingleSampleMode(ADC_MEM0, true);
MAP_ADC14_configureConversionMemory(ADC_MEM0, ADC_VREFPOS_AVCC_VREFNEG_VSS, ADC_INPUT_A0, false);

// /* Set ADC result format to signed binary */
MAP_ADC14_setResultFormat(ADC_SIGNED_BINARY);

/* Configuring DMA module */
MAP_DMA_enableModule();
MAP_DMA_setControlBase(controlTable);
MAP_DMA_assignChannel(DMA_CH7_ADC14);
MAP_DMA_disableChannelAttribute(DMA_CH7_ADC14, UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST | UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK);

/* Setting Control Indexes. In this case we will set the source of the
* DMA transfer to ADC14 Memory 0
* and the destination to the
* destination data array. */
MAP_DMA_setChannelControl(UDMA_PRI_SELECT | DMA_CH7_ADC14, UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
MAP_DMA_setChannelTransfer(UDMA_PRI_SELECT | DMA_CH7_ADC14, UDMA_MODE_BASIC, (void*) &ADC14->MEM[0], data_array1, SAMPLE_LENGTH);

MAP_DMA_setChannelControl(UDMA_ALT_SELECT | DMA_CH7_ADC14, UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
MAP_DMA_setChannelTransfer(UDMA_ALT_SELECT | DMA_CH7_ADC14, UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[0], data_array2, SAMPLE_LENGTH);
P1->OUT ^= BIT0;
/* Assigning/Enabling Interrupts */
MAP_DMA_assignInterrupt(DMA_INT1, 7);
MAP_Interrupt_enableInterrupt(INT_DMA_INT1);
MAP_DMA_assignChannel(DMA_CH7_ADC14);
MAP_DMA_clearInterruptFlag(7);
MAP_Interrupt_enableMaster();

/* Now that the DMA is primed and setup, enabling the channels. The ADC14
* hardware should take over and transfer/receive all bytes */
MAP_DMA_enableChannel(7);
MAP_ADC14_enableConversion();

while(1)
{
MAP_ADC14_enableConversion();
MAP_PCM_gotoLPM0();
}
}


/* Completion interrupt for ADC14 MEM0 */
void DMA_INT1_IRQHandler(void)
{

P1->OUT ^= BIT0;
MAP_DMA_clearInterruptFlag(7);
MAP_DMA_disableInterrupt(INT_DMA_INT1);
}

  • I would suggest starting with this thread on E2E, which shows MSP432 DMA being used by ADC and SPI simultaneously. The code there provdes an example similar to what you are trying to do. (Actually, the example has multiple ADC channels in use, so it's better for educational purposes).

    EDIT- Using the thread above will help resolve many of the issues pointed to by Evan's post, with the exception of the Black LaunchPad use.

    -Bob

  • Prince,

    A few concerns to start off with.

    Based on your include paths, it doesn't seem that you are using the SimpleLink MSP432 SDK yet. MSP432Ware is no longer updated, but everything that MSP432Ware contained (driverlib, examples, etc) is now contained within the SimpleLink MSP432 SDK and is actively updated at a quarterly release rate. The following document, section 3, has more information on this and any porting information www.ti.com/.../slaa700a.pdf

    I also have some concerns that you might be using a black LaunchPad based on the fact that you have your wait-states set to 2. Is this correct? If so, the black LaunchPad contains experimental 'XMS' pre-released silicon that we no longer support. Our first recommendation would be to get a Red LaunchPad which contains released silicon that has a number of bug fixes that could be impacting any difficulties you are seeing.

    For example, between the pre-released experimental silicon and the released silicon, we enhanced the flash to work at 1 wait state at 48MHz instead of 2.

    All that to say, have you had a chance to checkout this code example? dev.ti.com/.../

    This demo software demonstrates detecting vibration noise in sub-sonic, audio-band and ultra-sonic spectrum on the MSP-EXP432P401R LaunchPad development kit. For more details read the Application Report www.ti.com/.../slaa735.pdf

    Upon running the demo, the device samples the Analog channels A0, A1 and A2 once every 5 minutes.

    I also may have some internal code that might help depending on some of your responses. More information with regards to the errors that you are seeing as well would be helpful in debugging as we move forward, but do please make sure you are on updated/released to market silicon and our current software platform to start.

    Thank you! Hope this helps some.
  • yes Evan, i m using black launchpad and now i m going to use simplelink_msp432_SDK, SO, what is the basuc step to learn ADC+DMA codes , please help me.
  • Prince,

    Again, I would like to emphasis the importance of moving to the Red LaunchPad in addition to the SDK. The Red Launchpad contains production grade silicon where as the black LaunchPad contains experimental silicon that we have since made lots of changes that are incorporated in our released silicon (like the number of Flash Wait-States). You can get a new Red MSP432 LaunchPad here: http://www.ti.com/tool/msp-exp432p401r

    Aside from all of that, the examples that I've pointed you to above, our documentation within the TRM/datasheet and asking questions on e2e is the best way to learn ADC and DMA.

    I've also attached a code example that is similar to what you are working with, but this code was written for a Red LaunchPad + the SimpleLink MSP432 SDK.

    See attachment: 

    /*
     * -------------------------------------------
     *    MSP432 DriverLib - v3_10_00_09 
     * -------------------------------------------
     *
     * --COPYRIGHT--,BSD,BSD
     * Copyright (c) 2014, Texas Instruments Incorporated
     * All rights reserved.
     *
     * Redistribution and use in source and binary forms, with or without
     * modification, are permitted provided that the following conditions
     * are met:
     *
     * *  Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     * *  Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the distribution.
     *
     * *  Neither the name of Texas Instruments Incorporated nor the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     * --/COPYRIGHT--*/
    /*******************************************************************************
     * MSP432 ADC14 - Single Channel Continuous Sample w/ Timer_A Trigger
     *
     * Description: In this ADC14 code example, a single input channel is sampled
     * using the standard 3.3v reference. The source of the sample trigger for this
     * example is Timer_A CCR1. The ADC is setup to continuously sample/convert
     * from A0 when the trigger starts and store the results in resultsBuffer (it
     * is setup to be a circular buffer where resPos overflows to 0). Timer_A, CCR0
     * and CCR1 are configured to generate a PWM. The CCR0 value is 23 and CCR1 is
     * set to 11, resulting in a PWM of 1us period.  The sample time is driven by
     * the ADC clock and not the PWM duty cycle.
     *
     * The PWM is started once the GPIO interrupt for P1.1 is serviced.
     *
     *                MSP432P401
     *             ------------------
     *         /|\|                  |
     *          | |                  |
     *          --|RST         P5.5  |<--- A0 (Analog Input)
     *            |                  |
     *            |            P1.1  |<--- GPIO trigger to Start conversions
     *            |                  |
     *            |            P1.0  |---> Debug port to show DMA ISR
     *            |            P2.4  |---> Debug TA0.1, ADC trigger
     *            |                  |
     *
     * Author: Timothy Logan/ C. Sterzik
     ******************************************************************************/
    /* DriverLib Includes */
    #include <ti/devices/msp432p4xx/driverlib/driverlib.h>
    
    /* Standard Includes */
    #include <stdint.h>
    #include <stdbool.h>
    
    #define ARRAY_LENGTH	            16000
    #define NUMBER_OF_DMA_PING_PONGS       15 //16000/1024
    #define REMAINDER                   16000-1024*NUMBER_OF_DMA_PING_PONGS
    
    /*
     * Timer_A Compare Configuration Parameter
     * CCR1 is used to trigger the ADC14, conversion time
     * is defined by the resolution
     * 14bit -> 16 cycles + 1 cycle (SLAU356d, 20.2.8.3)
     * 12bit -> 14 cycles + 1 cycle
     * 10bit -> 11 cycles + 1 cycle
     *  8bit ->  9 cycles + 1 cycle
     *
     *  In this example, 14-bit resolution at 24Mhz ~708ns conversion time
     *  Sample time is defined by 4 ADC clocks, pulse sample mode
     *  Sample period is 24/24Mhz = 1us
     */
    const Timer_A_PWMConfig timerA_PWM =
    {
        .clockSource = TIMER_A_CLOCKSOURCE_SMCLK,
        .clockSourceDivider = TIMER_A_CLOCKSOURCE_DIVIDER_1,
        .timerPeriod = 28,
    //    .timerPeriod = 27, // 857.1Khz in pulse sample mode
        .compareRegister = TIMER_A_CAPTURECOMPARE_REGISTER_1,
        .compareOutputMode TIMER_A_OUTPUTMODE_SET_RESET,
    //    .dutyCycle = 19
        .dutyCycle = 11
    };
    
    /* DMA Control Table */
    #if defined(__TI_COMPILER_VERSION__)
    #pragma DATA_ALIGN(MSP_EXP432P401RLP_DMAControlTable, 1024)
    #elif defined(__IAR_SYSTEMS_ICC__)
    #pragma data_alignment=1024
    #elif defined(__GNUC__)
    __attribute__ ((aligned (1024)))
    #elif defined(__CC_ARM)
    __align(1024)
    #endif
    static DMA_ControlTable MSP_EXP432P401RLP_DMAControlTable[16];
    
    /* Statics */
    uint16_t resultsBuffer[ARRAY_LENGTH];
    
    uint8_t pingPongCounter;
    
    uint16_t arrayOffset;
    uint32_t arraySize, arrayMode;
    
    int main(void)
    {
        /* Halting WDT  */
        MAP_WDT_A_holdTimer();
        MAP_Interrupt_enableSleepOnIsrExit();
    
        /* Starting HFXT in non-bypass mode without a timeout. Before we start
          * we have to change VCORE to 1 to support the 48MHz frequency */
    
        /*
         * Revision C silicon supports wait states of 1 at 48Mhz
         */
        MAP_PCM_setCoreVoltageLevel(PCM_VCORE1);
        MAP_FlashCtl_setWaitState(FLASH_BANK0, 1);
        MAP_FlashCtl_setWaitState(FLASH_BANK1, 1);
    
        /*
         * Setting up clocks
         * MCLK = MCLK = 48MHz
         * SMCLK = MCLK/2 = 24Mhz
         * ACLK = REFO = 32Khz
         */
        MAP_CS_setDCOFrequency(48000000);
        MAP_CS_initClockSignal(CS_ACLK, CS_REFOCLK_SELECT, CS_CLOCK_DIVIDER_1);
        MAP_CS_initClockSignal(CS_SMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_2);
        MAP_CS_initClockSignal(CS_MCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1);
    
        /*
         * Debug
         * Configuring P1.0 as output
         */
        MAP_GPIO_setAsOutputPin(GPIO_PORT_P1, GPIO_PIN0);
        P1OUT &= ~BIT0;
    
        /*
         * Configuring GPIOs (5.5 A0)
         */
        MAP_GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P5, GPIO_PIN5,
        GPIO_TERTIARY_MODULE_FUNCTION);
    
        /*
         * Debug: set TA0.1 as output to see ADC trigger signal
         */
        MAP_GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P2, GPIO_PIN4,
        GPIO_PRIMARY_MODULE_FUNCTION);
    
        /*
         * Configuring P1.1 as an input and enabling interrupt, the timer is started from
         * GPIO ISR.
         */
        MAP_GPIO_setAsInputPinWithPullUpResistor(GPIO_PORT_P1, GPIO_PIN1);
        MAP_GPIO_interruptEdgeSelect(GPIO_PORT_P1,GPIO_PIN1,GPIO_HIGH_TO_LOW_TRANSITION);
        MAP_GPIO_clearInterruptFlag(GPIO_PORT_P1, GPIO_PIN1);
        MAP_GPIO_enableInterrupt(GPIO_PORT_P1, GPIO_PIN1);
    
        /* Initializing ADC (SMCLK/1/1) */
        MAP_ADC14_enableModule();
        MAP_ADC14_initModule(ADC_CLOCKSOURCE_SMCLK, ADC_PREDIVIDER_1, ADC_DIVIDER_1,
                0);
    
        /*
         * Configuring ADC Memory, repeat-single-channel, A0
         */
        MAP_ADC14_configureSingleSampleMode(ADC_MEM0, true);
    
        /*
         * Configuring ADC Memory, reference, and single ended conversion
         * A0 goes to mem0, AVcc is the reference, and the conversion is
         * single-ended
         */
        MAP_ADC14_configureConversionMemory(ADC_MEM0, ADC_VREFPOS_AVCC_VREFNEG_VSS,
        ADC_INPUT_A0, false);
        /*
         * Configuring the sample trigger to be sourced from Timer_A0 CCR1 and on the
         * rising edge, default samplemode is extended (SHP=0)
         */
    //    MAP_ADC14_setSampleHoldTrigger(ADC_TRIGGER_SOURCE1, false);
        MAP_ADC14_setSampleHoldTrigger(ADC_TRIGGER_ADCSC, false);
    
        /*
         * Set SHP=1 for pulse sample mode, and set length to 4 clocks, the ADC
         * is manually triggered from the timer
         */
    //    MAP_ADC14_enableSampleTimer(ADC_MANUAL_ITERATION);
        MAP_ADC14_enableSampleTimer(ADC_AUTOMATIC_ITERATION);
        MAP_ADC14_setSampleHoldTime(ADC_PULSE_WIDTH_4,ADC_PULSE_WIDTH_4);
    
    //    MAP_ADC14_setResolution(ADC_10BIT);  // 11 Cycles + 4 cycles + 1 cycle + sync :: less than 24
    //    MAP_ADC14_setResolution(ADC_12BIT);    // 14 cycles + 4 cycles + 1 cycle + syn  :: >= 24 cycles
    
        /* Enabling conversions */
        MAP_ADC14_enableConversion();
    
        /* Configuring DMA module */
        MAP_DMA_enableModule();
        MAP_DMA_setControlBase(MSP_EXP432P401RLP_DMAControlTable);
    
        /*
         * Setup the DMA + ADC14 interface
         */
        MAP_DMA_disableChannelAttribute(DMA_CH7_ADC14,
                                     UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |
                                     UDMA_ATTR_HIGH_PRIORITY |
                                     UDMA_ATTR_REQMASK);
    
        /*
         * Setting Control Indexes. In this case we will set the source of the
         * DMA transfer to ADC14 Memory 0 and the destination to the destination
         * data array.
         */
        MAP_DMA_setChannelControl(UDMA_PRI_SELECT | DMA_CH7_ADC14,
        		UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
        MAP_DMA_setChannelTransfer(UDMA_PRI_SELECT | DMA_CH7_ADC14,
        		UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[0],
    			(void*)resultsBuffer, 1024);
        MAP_DMA_setChannelControl(UDMA_ALT_SELECT | DMA_CH7_ADC14,
        		UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
        MAP_DMA_setChannelTransfer(UDMA_ALT_SELECT | DMA_CH7_ADC14,
        		UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[0],
    			(void*)&resultsBuffer[1024], 1024);
    
        /* Assigning/Enabling Interrupts */
        MAP_DMA_assignInterrupt(DMA_INT1, 7);
        MAP_DMA_assignChannel(DMA_CH7_ADC14);
        MAP_DMA_clearInterruptFlag(7);
    
        /* Enabling Interrupts */
        MAP_Interrupt_enableInterrupt(INT_DMA_INT1);
        MAP_Interrupt_enableInterrupt(INT_PORT1);
        MAP_Interrupt_enableMaster();
    
        /* Going to sleep */
        MAP_PCM_gotoLPM0();
        __no_operation();
    }
    
    /*
     *  15 Primary completed   resultArray[0-1023]
     *  14 Alternate completed resultArray[1024-2047]
     *
     *  3  Primary completed   resultArray[12288-13311]
     *  2  Alternate Completed resultArray[13312-14335] * setup last alternate here
     *  1  Primary completed   resultArray[14336-15359]
     *  0  Alternate completed resultArray[15360-15999]
     *
     */
    __attribute__((ramfunc))  // Requires compiler TI v15.12.1.LTS
    void DMA_INT1_IRQHandler(void)
    {
    
        BITBAND_PERI(P1->OUT, 0) = 1;
    
        if(pingPongCounter == 0)
        {
            MAP_Timer_A_stopTimer(TIMER_A0_BASE);
            MAP_DMA_disableChannel(7);
            MAP_DMA_disableChannelAttribute(DMA_CH7_ADC14,UDMA_ATTR_ALTSELECT);
    
            /*
             * Setting Control Indexes. In this case we will set the source of the
             * DMA transfer to ADC14 Memory 0 and the destination to the destination
             * data array.
             */
            MAP_DMA_setChannelControl(UDMA_PRI_SELECT | DMA_CH7_ADC14,
                    UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
            MAP_DMA_setChannelTransfer(UDMA_PRI_SELECT | DMA_CH7_ADC14,
                    UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[0],
                    (void*)resultsBuffer, 1024);
            MAP_DMA_setChannelControl(UDMA_ALT_SELECT | DMA_CH7_ADC14,
                    UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
            MAP_DMA_setChannelTransfer(UDMA_ALT_SELECT | DMA_CH7_ADC14,
                    UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[0],
                    (void*)&resultsBuffer[1024], 1024);
        }
        else
        {
            if(pingPongCounter > 1)
            {
                arrayOffset = 1024*(NUMBER_OF_DMA_PING_PONGS-pingPongCounter+2);
                if(pingPongCounter == 2)
                {
                    arraySize = REMAINDER;
                    arrayMode = UDMA_MODE_BASIC;
                }
                else
                {
                    arraySize = 1024;
                    arrayMode = UDMA_MODE_PINGPONG;
                }
                /*
                 * Switch between primary and alternate bufferes with DMA's PingPong mode
                 */
                if (MAP_DMA_getChannelAttribute(7) & UDMA_ATTR_ALTSELECT)
                {
    //                MAP_DMA_setChannelTransfer(UDMA_PRI_SELECT | DMA_CH7_ADC14, arrayMode,
    //                                           (void*) &ADC14->MEM[0],
    //                                           (void*)&resultsBuffer[arrayOffset],arraySize);
    
                    MSP_EXP432P401RLP_DMAControlTable[7].dstEndAddr =
                            (void*)&resultsBuffer[arrayOffset+arraySize];
                    MSP_EXP432P401RLP_DMAControlTable[7].control =
                            (MSP_EXP432P401RLP_DMAControlTable[7].control & 0xff000000 ) |
                            (((arraySize)-1)<<4) | arrayMode;
                }
                else
                {
    //                MAP_DMA_setChannelTransfer(UDMA_ALT_SELECT | DMA_CH7_ADC14, arrayMode,
    //                                           (void*)&ADC14->MEM[0],
    //                                           (void*)&resultsBuffer[arrayOffset],arraySize);
                    MSP_EXP432P401RLP_DMAControlTable[15].dstEndAddr =
                            (void*)&resultsBuffer[arrayOffset+arraySize];
                    MSP_EXP432P401RLP_DMAControlTable[15].control =
                            (MSP_EXP432P401RLP_DMAControlTable[15].control & 0xff000000 ) |
                            (((arraySize)-1)<<4) | arrayMode;
                }
            }
            pingPongCounter--;
        }
    
        BITBAND_PERI(P1->OUT, 0) = 0;
    }
    
    void PORT1_IRQHandler(void)
    {
        BITBAND_PERI(P1->OUT, 0) = 1;
        P1IFG &= ~BIT1;
        pingPongCounter  = NUMBER_OF_DMA_PING_PONGS;
        MAP_DMA_enableChannel(7);
    //    MAP_Timer_A_generatePWM(TIMER_A0_BASE, &timerA_PWM);
        MAP_ADC14_toggleConversionTrigger();
        BITBAND_PERI(P1->OUT, 0) = 0;
    }
    

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