MSP432P401R: eUSCI - transferring greater than 8-bit word width in SPI mode

David,
I think you have described the DMA accurately. The only trick would be to use the scatter-gather feature and create a task list(s) that would support the transfer, assuming the transfer size and function is always the same.

Is the multiple number of words being sent always the same and relatively small (<50)? The thought is that some of the tasks would handle the GPIO while others would load the eUSCI buffer. You could have the GPIO tasks be triggered automatically while the eUSCI tasks are triggered from the peripheral.

Conceptually, it might look like this for the 24-bit example:

DMA_ControlTable spi_24_Seq[TX_TASKS] =
{
/* Task1, Dummy read RX buffer to clear IFG */
DMA_TaskStructEntry(1, UDMA_SIZE_8,
UDMA_SRC_INC_NONE, &EUSCI_B1_SPI->RXBUF,
UDMA_DST_INC_NONE, &dummyRX,
UDMA_ARB_1, (UDMA_MODE_MEM_SCATTER_GATHER)),
/* Task2, Clear Chip select P6.2 */
DMA_TaskStructEntry(1, UDMA_SIZE_8,
UDMA_SRC_INC_NONE, &outputLow,
UDMA_DST_INC_NONE, &P6->OUT,
UDMA_ARB_1, (UDMA_MODE_MEM_SCATTER_GATHER)),
/* Task3, load TX buffer to initiate SPI */
DMA_TaskStructEntry(2, UDMA_SIZE_8,
UDMA_SRC_INC_8, &txBuffer[0],
UDMA_DST_INC_NONE, &EUSCI_B1_SPI->TXBUF,
UDMA_ARB_2, (UDMA_MODE_PER_SCATTER_GATHER)),
/* Task4, Dummy read RX buffer to clear IFG, wait for RXIFG trigger */
DMA_TaskStructEntry(1, UDMA_SIZE_8,
UDMA_SRC_INC_NONE, &EUSCI_B1_SPI->RXBUF,
UDMA_DST_INC_NONE, &dummyRX,
UDMA_ARB_1, (UDMA_MODE_MEM_SCATTER_GATHER)),
/* Task 5, load TX buffer to initiate SPI */
DMA_TaskStructEntry(1, UDMA_SIZE_8,
UDMA_SRC_INC_NONE, &txBuffer[2],
UDMA_DST_INC_NONE, &EUSCI_B1_SPI->TXBUF,
UDMA_ARB_1, (UDMA_MODE_PER_SCATTER_GATHER)),
/*
* Task 6, Dummy read RX buffer to clear IFG
* This delay ensures that the chip select happens after the last byte is transmitted
*/
DMA_TaskStructEntry(2, UDMA_SIZE_8,
UDMA_SRC_INC_NONE, &EUSCI_B1_SPI->RXBUF,
UDMA_DST_INC_NONE, &dummyRX,
UDMA_ARB_2, (UDMA_MODE_MEM_SCATTER_GATHER)),
/* Task 7, set GPIO, chip select */
DMA_TaskStructEntry(1, UDMA_SIZE_8,
UDMA_SRC_INC_NONE, &DAC_CS,
UDMA_DST_INC_NONE, &P6->OUT,
UDMA_ARB_4, UDMA_MODE_MEM_SCATTER_GATHER)
// copy (repeat) tasks 2-7 ‘n’ times


// for the last one it would need to look like this

/*
* Task 6, Dummy read RX buffer to clear IFG
* This delay ensures that the chip select happens after the last byte is transmitted
*/
DMA_TaskStructEntry(2, UDMA_SIZE_8,
UDMA_SRC_INC_NONE, &EUSCI_B1_SPI->RXBUF,
UDMA_DST_INC_NONE, &dummyRX,
UDMA_ARB_2, (UDMA_MODE_MEM_SCATTER_GATHER)),
/* Task 7, set GPIO, chip select */
DMA_TaskStructEntry(1, UDMA_SIZE_8,
UDMA_SRC_INC_NONE, &DAC_CS,
UDMA_DST_INC_NONE, &P6->OUT,
UDMA_ARB_4, UDMA_MODE_BASIC)


};

Chris