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Setting MCLK to 16Mhz on MSP430f2232

rmznrkn
Prodigy 140 points
Other Parts Discussed in Thread: MSP430F2232, MSP430F2013

Hi,

I am trying to run my  msp430f2232(mclk) at the frequency  16MHz, however it continuously gets reset, and goes to NMI_ISR routine(the value of IFG1 is 0x06, power on interrupt + oscillator fault) .

 The code as follows:

#include "msp430x22x2.h"
unsigned char g_ucTemp = 0;
void main(void)
{
  WDTCTL = WDTPW +WDTHOLD;                  // Stop Watchdog Timer
 
  BCSCTL1 = CALBC1_16MHZ;                    // Set DCO to 16MHz
  DCOCTL  = CALDCO_16MHZ;
 
  IE1 |= OFIE;
  __bis_SR_register(GIE);
  while(1)
  {
     g_ucTemp = g_ucTemp;    
  }
}
#pragma vector=NMI_VECTOR
__interrupt void NMI_ISR (void)
{
   g_ucTemp = IFG1;
   if(g_ucTemp & OFIFG)
   {
      g_ucTemp = g_ucTemp;
   }
}

 

I run the same code on msp430f2013, at the beginning it goes to NMI_ISR only one time, then it runs correctly. 

And I want to add an additional thing different from this topic. Previously I tried to make comminication between  msp430f2232(slave) and an another MCU(LM3S9B92) by using USCI.SPI interface, the msp430f2232 was also getting reset when I reset LM3S9B92 device. 

What could be cause of this problem?

 

 

  • 0
    Prodigy 140 points

    And I also add something, while I am debugging by using IAR tools, the value of basic clock module registers looks as follows:

    For  msp430f2232

    DCOCTL ->    0x60

    BCLKCTL1 -> 0xff

    BCLKCTL2 -> 0x00

    BCLKCTL3 -> 0x05

     

    For  msp430f2013

    DCOCTL ->    0x8f

    BCLKCTL1 -> 0x8f

    BCLKCTL2 -> 0x00

    BCLKCTL3 -> 0x05

  • 0
    Expert 1240 points

    I have seen this problem myself when I try to use too low of a VDD voltage.

  • 0
    Expert 1725 points

    From the 2xx User Guide:

    The OFIFG oscillator-fault flag is set and latched at POR or when an oscillator
    fault (LFXT1OF, or XT2OF) is detected. When OFIFG is set, MCLK is sourced
    from the DCO, and if OFIE is set, the OFIFG requests an NMI interrupt. When
    the interrupt is granted, the OFIE is reset automatically. The OFIFG flag must
    be cleared by software. The source of the fault can be identified by checking
    the individual fault bits.

     

    You should not enable the OFIE bit before clearing the OFIFG (to ensure it is cleared you may have to use a loop that clears the flag and waits >50us - test flag again and loop until bit is cleared).

    Do you use an external crystal/oscillator?  If not then you don't need to use the OFIFG at all so don't enable the NMI.

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