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CCS/MSP430FR4133: Why the ADC can also work with MODCLK in LPM3 in MSP430FR4133

Part Number: MSP430FR4133

Tool/software: Code Composer Studio

Hi  :

We can see that MODCLK is closed in LPM3 in MSP430FR4133 Datasheet as below:

But when I used the ADC with MOKCLK in LPM3(with MSP430FR4133 LaunchPad), the ADC can also work(I changed the input voltage and the ADC result follow changed)! I used the RTC to start the ADC sampling and conversion (do not wake up CPU).

What's more there are about two or three cycles of SMCLK when the ADC started. The test code is attached.

paper_msp430fr413x_window.c.zip

Best regards

Gary Gao

  • Hi Gary,

    In the code you provided, the ADC is sourced from ACLK which is active in LPM3. However, I do see the commented out portion that would source it from MODCLK.

    There are a couple things that might make the MODCLK work when the device is in LPM3:

    1. Setting the MODOSCREQEN bit in the CSCTL8 register
      1. This will allow the MODCLK to run when requested by the ADC module
    2. The device isn't actually entering LPM3
      1. This could be because a debugger is attached keeping the device from truly entering LPM3

    Scenario 1 is unlikely because you aren't writing to this register and the default is MODOSCREQEN = 0. But can you double check that this bit is set to 0 for me? Also can you test out this behavior when the device is free running and not attached to a debugger?

    Best regards, 

    Caleb Overbay

  • Hi Caleb:

    I have double checked the MODOSCREQEN = 0 as below:

    I have test the device is free running and not attached to a debug condition, but the ADC is still running with MODCLK in LPM3. 

    Here is the hardware I have used:

    The test software is here:

    paper_msp430fr413x_window_lpm3_test.c.zip

    Best regards

    Gary Gao

  • Hi Gary,

    Thank you for the extra detail. I've been able to observe this on my own setup but I'm not sure what could be causing it at the moment. I need to discuss this with some internal teams and then I'll get back to you.

    Best regards,
    Caleb Overbay
  • This thread was handled offline. To close it out here is our conclusion:

    According to Operating Modes Table 6-1 in the MSP430FR4133 datasheet, the ADC cannot operate above 32kHz in LPM3. For this reason, when the ADC is sourced from MODOSC in LPM3 and a conversion is triggered, the device enters an LPM0 like state. This is because the HighPower LDO is requested and this enables the SMCLK because the device moves to intermediate LPM0.

    Best regards,

    Caleb Overbay

  • Caleb, Gary,

    as mentioned offline already I think I provided bit misleading information.
    Definitly the ADC can run sourced by MODOSC during LPM3. However during acitve conversion the MODOSC clock request forces a wake-up from LPM3 to LPM0 to ensure proper ADC operation with the high frequency MODOSC clock which is not supported in a real LPM3 scenario.

    After conversion device goes back to LPM3. However during the LPM0 phase the SMCLK is turned on as well according the specification of LPM0.

    That is the way the tables Caleb posted above should be understood. No high frequency in LPM3 because device leaves LPM3 and forces a transition into LPM0.

    Sorry for confusion and hope it's clear now.
  • Hi Dietmar, Caleb,

    Thank you for your help.

    Best regards
    Gary Gao

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