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MSP430F5418: Watchdog does not trigger as expected.

Part Number: MSP430F5418


I have a situation with a design which on occasion seems to get itself locked into Low Power Mode (LPM 4). When in this locked up situation I can see that the 32Khz external crystal is running but all externals are powered down (as expected). It also appears that the RTC interrupt that I have set to run every two seconds fails to run which means that the processor cannot wake up.

When in this low power mode the processor runs a 2 second RTC interrupt which also refreshes the watchdog (with a timeout of three seconds - yes not great but better than not having it and the watchdog only operates in this mode when in LPM!).

My concern is that the RTC interrupt has stopped being serviced (I have a debug pin which I can see no longer toggles) and yet I get no watchdog reset. Why is this, does the watchdog not operate normally in LPM or is there something else going on!?

 

  • Hi Mike,

    It looks like this might be caused by the WDG4 errata in the F418 Erratasheet. The WDTSSEL bits in the WDTCTL register determine which clock is sourcing the watchdog timer. If the corresponding xREQEN bit in UCSCTL8 is set to zero for the watchdog timer clock source, a watchdog event will not occur.

    If the xREQEN bit is enabled, the clock will remain available for the watchdog timer to use, but the device will not be able to enter LPM 4.

    Regards,

    Ryan

  • Apologies I wrote a typo in my post - the processor drops to LPM3 not LPM4.
    I just re-checked and the WDT is configured always to use VLO Clock. I do not see that this is turned off can you confirm if this will be affected by the errata mentioned. Equally I am not sure how or if I can check that this clock is in fact still running!
  • Hi Mike,

    Are you initializing the watchdog timer in a similar fashion to the code below? This code shows that the watchdog timer can set the VLO as the clock source and reset the MSP430 every ~1 second from lpm3. WDTCTL should be written to directly with a "=" operator versus "|=" or "&=" so that WDTPW is written to it correctly.

    #include <msp430.h>
    
    int main(void)
    {
      WDTCTL = WDTPW | WDTSSEL_2 | WDTIS_5;
      P1DIR |= 0x01;                            // Set P1.0 to output
      P1OUT ^= 0x01;                            // Toggle P1.0
    
      __bis_SR_register(LPM3_bits + GIE);       // Enter LPM3
      __no_operation();                         // For debugger
    }

    Regards,

    Ryan

  • Hi Mike,

    Can you confirm your code initializes the watchdog to use VLO Clock in a similar manner to the code above or do you have any other updates?

    Thanks,
    Ryan
  • Closing thread due to inactivity.

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