Other Parts Discussed in Thread: DRV91680
im new to this MCM DRV91680 and MSP430 Family.
im learning this MCM by practice the core function one by one.
There is some problem in the Timer B PWM control.
I have try many time but there is still no signal come out.
Here is my code.
#include <drv91680.h>
void main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
CCSCTL0 = SCSKEY + WSEN + DIVA__8 + DIVS__0 + DIVM__1; // SMCLK = 25Mhz = MCLK SMCLK=12.5M ACLK=3.125M
//PWM PIN Configuration
P2DIR |= 0xFE; // Set P2.1, P2.2, P2.3, P2.4, P2.5 and P2.6 as an output
P2SEL |= 0x7E; // Port 2 used as timer outputs
TBCTL |= TBSSEL_0; // clockSource. main clock
TBCTL |= ID_0; // clockDivider. 25MHz master clock divider
TBCCR0 = 1000; // Period timer B count, 1250 count represents 50uS
//set out put mode to GPIO low
TBCCTL1 = OUTMOD_0;
TBCCTL2 = OUTMOD_0;
TBCCTL3 = OUTMOD_0;
TBCCTL5 = OUTMOD_0;
TBCCTL4 = OUTMOD_0;
TBCCTL6 = OUTMOD_0;
// reset compare
TBCCR1 = 0x00;
TBCCR2 = 0x00;
TBCCR3 = 0x00;
TBCCR4 = 0x00;
TBCCR5 = 0x00;
TBCCR6 = 0x00;
__bis_SR_register(GIE);
TBCCR1 = 100;
TBCCR2 = 100;
TBCCR3 = 100;
TBCCR4 = 100;
TBCCR5 = 100;
TBCCR6 = 100;
TBCCTL1 = OUTMOD_0;
TBCCTL2 = OUTMOD_6;
TBCCTL3 = OUTMOD_0;
TBCCTL5 = OUTMOD_0 | BIT2;
TBCCTL4 = OUTMOD_0;
TBCCTL6 = OUTMOD_0;
TBCTL = 0x0000; // clear the control
TBCTL = TBSSEL_2 | TBCLR | MC_1;
while(1){}
}
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