MSP430F5438: system halted when power on

Hi Ming,

This could be due to core voltage failure but it is hard to discern with such little information. Please provide schematics, code initialization, and oscilloscope screenshots of VCC, RST, XT1/2, and COREV pins for more assistance with the issue. Note that the MSP430F5438 is NRND and that the pin-compatible MSP430F5438A should be used instead, differences are covered in SLAA419: http://www.ti.com/lit/an/slaa419b/slaa419b.pdf 

Regards,
Ryan

hi Ryan

The related circuit schematic and code are as follows:

It is an abnormal phenomenon that system halted when power on, but when I short C32 device,RST to GND, the Circuit is OK.The follow-up can be used normally, and the phenomenon can not be recovered.

But The phenomenon can be recovered when the following operations are carried out:

Non contact static electricity test for the whole product,±16KV，20HZ，20pps.

after 2-3 times the product gets into the abnormal state (no liquid crystal display),which is an abnormal phenomenon that system halted when power on. Unless RST is pulled to the ground.

It seems that MSP430F5438 is in a certain state of protection, with tweezers short connected to both side of C32 (RST to GND ), the system can be normally on power, and MCU can be started.

it may be the design of the reset circuit is unreasonable, how much capacitance and resistance should be set?

Or in what way does it improve? Or MSP430F5438 has some kind of protection mechanism?

Hi,Ryan

   Thanks for your reply.

   This problem may involve the reasonable setting of external capacitance and the customer schematic diagram as below.

   How does this match,RST capacitance C98\C99 C32; The DVCC(DVCC1\DVCC2\DVCC3\DVCC4

) pin capacitance C30\C31\C34\C35\C36 and the Vcore pin capacitance C33? How many capacitance values are set, setting reference value can avoid this problem? 

  Can you provide internal principle description?