SNMI and UNMI handlers are not executed

Hello,

I have a MSP430F5436A, which I am currently running on the MSP-TS430PZ5x100 evaluation board. I am using IAR EW 5.10.4.

While looking into a problem regarding the PMM I added code to set the IE flags for the SVS and SVM and added the interrupt handlers for the system NMI and user NMI. Since then my device constantly resets.

I reproduced the problem with the following code executing on a MSP430F5438 (not the MSP430F5436A) in the same eval board.


    //----------------------------------------------------------------------------
    // main function

    int main( void )
    {
      // Stop watchdog timer to prevent time out reset
      WDTCTL = WDTPW + WDTHOLD;

      // Pin 85 - MCLK
      P11DIR  = BIT1;
      P11SEL  = BIT1;

      P1DIR = BIT0;
      P10OUT = 0x00;
      P10DIR = ( BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5 | BIT6 | BIT7 );
     
      P10OUT = BIT0;      // set this for the logic analyzer 
     
      if ( ( PMMRIE & SVMHIE ) != SVMHIE )
      {
        PMMRIE |= SVMHIE;
      }
     
      // we never get here....
      for ( ;; )
      {
        __delay_cycles( 1000000 );
        P1OUT ^= BIT0;
      }

      return 0;
    }



    //----------------------------------------------------------------------------
    // UNMI Interrupt handler

    #pragma vector=UNMI_VECTOR
    __interrupt static void UNMI_ISR(void)
    {
      switch(__even_in_range(SYSUNIV,0x08u))
      {
      case SYSUNIV_NMIIFG:
        break;
       
      case SYSUNIV_OFIFG:
        break;

      case SYSUNIV_ACCVIFG:
        break;

      case SYSUNIV_SYSBERRIV:
        break;
      }
    }


    //----------------------------------------------------------------------------
    // SYSNMI Interrupt handler
   
    #pragma vector=SYSNMI_VECTOR
    __interrupt static void SYSNMI_ISR(void)
    {
      switch(__even_in_range(SYSSNIV,0x12u))
      {
      case SYSSNIV_SVMLIFG:
        P10OUT |= ( BIT0 | BIT1 );
        break;

      case SYSSNIV_SVMHIFG:
        P10OUT |= ( BIT0 | BIT2 );
        break;

      case SYSSNIV_DLYLIFG:
        P10OUT |= ( BIT0 | BIT3 );
        break;

      case SYSSNIV_DLYHIFG:
        P10OUT |= ( BIT0 | BIT4 );
        break;

      case SYSSNIV_VMAIFG:
        P10OUT |= ( BIT0 | BIT5 );
        break;

      case SYSSNIV_JMBINIFG:
        break;

      case SYSSNIV_JMBOUTIFG:
        break;

      case SYSSNIV_VLRLIFG:
        P10OUT |= ( BIT0 | BIT6 );
        break;

      case SYSSNIV_VLRHIFG:
        P10OUT |= ( BIT0 | BIT7 );
        break;
      }
    }
    //----------------------------------------------------------------------------

 
When stepping through the code with the debugger, I can observe an interrupt request right after the write access to PMMRIE. However, my interrupt handler does not get called. It can only be seen in the disassmbly code.
After writing to PMMRIE the PC is set to 00FFFA, then to 00FFFC and eventually to 00FFFE. Below is an excerpt from the disassembly window:


    ...
     00FFEA    FFFF FFFF          and.b   @R15+,0xFFFF(R15)
     00FFEE    FFFF FFFF          and.b   @R15+,0xFFFF(R15)
     00FFF2    FFFF FFFF          and.b   @R15+,0xFFFF(R15)
     00FFF6    FFFF FFFF          and.b   @R15+,0xFFFF(R15)
    UNMI_ISR::??INTVEC 122:
     00FFFA    5C0C               rla.w   R12
    SYSNMI_ISR::??INTVEC 124:
     00FFFC    5C22               add.w   @R12,SR
    ?reset_vector:
     00FFFE    5C00               add.w   R12,PC
     010000    FFFF FFFF          and.b   @R15+,0xFFFF(R15)
     010004    FFFF FFFF          and.b   @R15+,0xFFFF(R15)
    ...


I ran the application without debugger, and observed the outputs on port 10 wit a logic analyzer. Same effect. Only P10.0 is set, all other bits remain low. I also looked at the MCLK on port 11 (P11.1). There are 11 negative edges (clock-cycles?) before the clock-signal remains high until it starts all over.

I also tried to set other IE flags for the PMMRIE register. Although the SVSLPE flag is already set (default setting) the line
    PMMRIE |= SVSLPE;
results in constant resets.

Any ideas, what I might be doing wrong here? Any help is greatly appreciated.

Regards
Hartmut