MSP432P401R: DMA UART Transmission and DMA UART Receive

Part Number: MSP432P401R

Is there a way to start a DMA TX without clearing the TXIFG? 

When a DMA TX completes the UART will have a (partial) character in the transmit shift register and the last character in the TXBUF register. The TXIFG will be set as these characters are shifted out the TX transmit shift register.  Hence, the TXIFG is already set when you want to send the next packet.  I can start another DMA TX by 1) reset the TXIFG and 2) either set the TXIFG or write a character into the TXBUF register.

The problem is either a reset or set of the TXIFG can affect the RXIFG if a receive DMA UART is in process since a reset or set of the TXIFG requires a read of the IFG register, modify a bit, then write the modified back to the IFG register.  Example, read the IFG register with the RXIFG equal '1',  RCV DMA reads the RXBUF, write the IFG register and the RXIFG is set again. RCV DMA reads the same character twice from the RXBUF register.

The only solution I can think of is to split the TX and RX acroos two UARTS.    Any other ideas???