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MSP432P401R: flash wait state confusion

Part Number: MSP432P401R

Hi,

I´m confused about the different information regarding wait state settings of the MSP432P401R (IPZ/Die revision D). I´m using it with the DCO (external resistor) at 48 Mhz and put it into the MCLCK domain with Divider 1. The VCore is set to 1 with the DCDC Converter:

MAP_FlashCtl_setWaitState(FLASH_BANK0,2);

MAP_FlashCtl_setWaitState(FLASH_BANK1,2);
MAP_PCM_setPowerState(PCM_AM_DCDC_VCORE1);
MAP_CS_enableDCOExternalResistor();
MAP_CS_setDCOCenteredFrequency(CS_DCO_FREQUENCY_48);
MAP_CS_setDCOFrequency(48000000);

MAP_CS_initClockSignal(CS_MCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1);

The wait states settings are copied from the examples.The datasheet on the other hand suggest one instead of two wait states in this szenario. The MSP432 online training series part 4 suggest two wait states.

So I´m confused and my application demands processing power. I`m eager to set it to one wait state. I´ve tried it and it worked but will this lead to problems in the field?

Thanks and best regards!

Steffen

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