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MSP430F5528: timer least count

Part Number: MSP430F5528

Hi,

What is the least count of timer a in msp430f5528? 

  • Hi Pabel,
    I don't get your point. Do you mean you want a very fast timer?

    Best regards,
    Cash Hao
  • Hi,
    It means what is the minimum time the timer can measure or what time it takes timer A to increase 0 to 1 in timer A register?
  • It depends on the clock source to the timer. If the clock source is 32768Hz, then the minimum time is (1 / 32768) ~30.5us. If your clock source is 24MHz, then it is ~42ns.

  • Hi,
    In my program LMP0 is selected,Timer clock is SMCLK selected. It is working, but what is the frequency of SMCLK I am not understanding. In XT2 a 24MHz crystal is connected.
    Can you explain what is that frequency ?




    Pabel
  • Hi Pabel,

    The frequency of SMCLK depends on how you set the UCSCTL4 register (section 5.4.5 of the User's Manual).

    Whenever using a new MCU, the clock system is probably the most important part to understand. I will encourage you to ready section 5 of the User's Manual from the link below:
    www.ti.com/.../slau208p.pdf

    If you still have questions about it, I will be happy to answer them.
  • Hi,

    Thanks for your help. I want to use the 24 MHz  crystal connected to XT2  so that I can get 42 ns accuracy.  In User's manual it is written taht "After a PUC, the UCS module default configuration is: DCOCLKDIV is selected for SMCLK" .   It means I have to set it  XT2 Oscillator  for SMCLK in my application. In other section it is written that XT2 clock can be selected for SMCLK by selecting SELS bits of UCSCTL4  and in active mode through LPM1. How to set it can you please explain.

    Thanks

    Pabel

  • Hi,
    I want to clock the timer from the external crystal connected on board to XT2 pins. That is a 24 MHz oscillator.
    How to select that for timer input?
  • Hi Pabel,

    Sorry I missed your previous post.

    Yes, you will have to explicitly set the source for SMCLK as XT2.

    SMCLK is enabled only when operating in Active Mode, LPM0, and LPM1. It is otherwise disabled and setting it for other modes is mute.

    So, to use the XT2, just set UCSCTL4 bits to all refer to XT2 as the source for MCLK and SMCLK. This will make the CPU and modules run at 24MHz.

    To set the timer source, use its control register to source the clock from SMCLK (See section 17.3.1 of the manual referenced in my previous post).

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