MSP430F5529: msp430f5529

Dear Benevolent members of this community,

I have a MSP430F5529LP, which I plan to use at 25MHz or beyond, so, I tried the code below, but it results the launchpad running at 24MHz, instead of 25MHz, so what am I doing wrong here? Also, I went upto 40MHz, so why doesn't TI advertise this capability? Could someone give me a detailed explaination of the implications of going beyond the advertised 25MHz. 

#include "driverlib.h"

void initClocks();

// Desired MCLK frequency

#define MCLK_FREQ_KHZ 25000  //25Mhz

// On board crystals frequencies (in Hz)

#define XT1_FREQ 32768
#define XT2_FREQ 4000000

// Crystal frequencies in Hz

#define XT1_KHZ XT1_FREQ/1000
#define XT2_KHZ XT2_FREQ/1000

// Ratio used to set DCO (Digitally Controlled Oscillator)
// Using 1 MHz (XT2/4)

#define MCLK_FLLREF_RATIO MCLK_FREQ_KHZ/(XT2_KHZ/4)

uint32_t mclk = 0;
uint32_t smclk = 0;
uint32_t aclk = 0;

int main(void)
{
    WDT_A_hold(WDT_A_BASE);
    initClocks();
    aclk=UCS_getACLK();
    mclk=UCS_getMCLK();
    smclk=UCS_getSMCLK();
    P1DIR |= BIT0|BIT2|BIT3;//Pin 1.2 and 1.3
    while (1)
    {
        P1OUT ^= 0x04;
    }
}

void initClocks(){

    // Set core power mode

    PMM_setVCore(PMM_CORE_LEVEL_3);

    // Configure pins for crystals

    GPIO_setAsPeripheralModuleFunctionInputPin(
    GPIO_PORT_P5,
    GPIO_PIN4+GPIO_PIN2
    );

    GPIO_setAsPeripheralModuleFunctionOutputPin(
    GPIO_PORT_P5,
    GPIO_PIN5+GPIO_PIN3
    );

    // Inform the system of the crystal frequencies

    UCS_setExternalClockSource(
       XT1_FREQ,  // Frequency of XT1 in Hz.
       XT2_FREQ   // Frequency of XT2 in Hz.
    );

    // Initialize the crystals

    UCS_turnOnXT2( // used to be UCS_XT2Start in previous driverlib version
       UCS_XT2_DRIVE_4MHZ_8MHZ
    );

    UCS_turnOnLFXT1( //used to be UCS_LFXT1Start in previous driverlib version
       UCS_XT1_DRIVE_0,
       UCS_XCAP_3
    );

    UCS_initClockSignal(
          UCS_FLLREF,         // The reference for Frequency Locked Loop
          UCS_XT2CLK_SELECT,  // Select XT2
          UCS_CLOCK_DIVIDER_4 // The FLL reference will be 1 MHz (4MHz XT2/4)
    );

    // Start the FLL and let it settle
    // This becomes the MCLCK and SMCLK automatically

    UCS_initFLLSettle(
        MCLK_FREQ_KHZ,
        MCLK_FLLREF_RATIO
    );

   // Optional: set SMCLK to something else than full speed

    UCS_initClockSignal(
       UCS_SMCLK,
       UCS_DCOCLKDIV_SELECT,
       UCS_CLOCK_DIVIDER_1
    );

    // Set auxiliary clock

    UCS_initClockSignal(
       UCS_ACLK,
       UCS_XT1CLK_SELECT,
       UCS_CLOCK_DIVIDER_1
    );
}

P.S., I didn't write this piece of code, I copied it from here: 

Thanks in advance.

With Warm Regards

Subhronil Chaudhuri