MSP430F5438A: Permanent flash damage

5xx flash family support marginal read mode, that can give info on any memory location regarding unable to erase / write to it. There is 7.3.5 section from slau208 MSP430x5xx and MSP430x6xx Family User's Guide ...

To get an early indication of weak memory cells, reading the flash can be done in combination with the
device-specific marginal read modes. The marginal read modes are controlled by the FCTL4.MRG0 and
FCTL4.MRG1 register bits if available (device specific). During marginal read mode, marginally
programmed flash memory bit locations can be detected. One method for identifying such memory
locations would be to periodically perform a checksum calculation over a section of flash memory (for
example, a flash segment) and repeating this procedure with the marginal read mode enabled. If they do
not match, it could indicate an insufficiently programmed flash memory location. It is possible to refresh
the affected Flash memory segment by disabling marginal read mode, copying to RAM, erasing the flash
segment, and writing back to it from RAM.

The program checking the flash memory contents must be executed from RAM. Executing code from flash
automatically disables the marginal read mode. The marginal read modes are controlled by the MRG0 and
MRG1 register bits. Setting MRG1 is used to detect insufficiently programmed flash cells containing a "1"
(erased bits). Setting MRG0 is used to detect insufficiently programmed flash cells containing a "0"
(programmed bits). Only one of these bits should be set at a time. Therefore, a full marginal read check
requires two passes of checking the flash memory content’s integrity. During marginal read mode, the
flash access speed (MCLK) must be limited to 1 MHz (see the device-specific data sheet).

Thank you for your reply.
I'm aware of the marginal read mode.
My question is not how to detect weakly programmed cells, my question is if a permanent damage (something that can not be solved by erasing and writing the data again) is expected due to a power off in the middle of a write / erase operation.

I developed (software and hardware) for my own (MSP-GANG like) MSP430 flasher. During development / testing, lot of bad things happen to target devices, overvoltage, undervoltage, to fast or too slow write / erase, including breaks during write / erase operations. Anything you can think of. And still, today, all of this target devices flash memory is OK. Marginal read error free. So my answer to your question is that I was not able to make permanent damage to flash, even I was trying really hard.

EDIT: BTW, the biggest pressure was on two 5435 (non A) samples (closest device that I have, related to topic). I don't get it how they function at all, today.

D:\msp430>flash -p com15 -f test_msp430f5435_fr.txt -e -ws -v -crcr -mrr

File: "test_msp430f5435_fr.txt"
Address: 01C00  Words: 106496
Size: 212992 bytes

Get Device
# JTID Fuse Device Core Hard Soft LotWafer DieX DieY
2  91   OK   5435  0100  10   10  ADE98146 0400 2000
3  91   OK   5435  0100  10   10  ADE98146 0A00 2100

Erase

Write Smart
Time: 1084 ms  Speed: 191,9 KB/s

Verify
Time: 955 ms  Speed: 217,6 KB/s

CRC Rev
File  #2   #3
3802 3802 3802
Time: 113 ms  Speed: 1.827,6 KB/s

Marginal Read Rev
Mode File  #2   #3
  0  3802 3802 3802
  1  3802 3802 3802
Time: 2159 ms  Speed: 96,3 KB/s

Release Device

Total Time: 4625 ms

D:\msp430>

Thank you very much for sharing.
My experience also says the same thing you say. I've been working with microcontrollers for while and I've also developed JTAG and in system programmers (for MSP430 and ARMs M4) and I was never able to permanently damage the flash memory.

I really would like to know what the official answer (from TI) is about this.
Is it possible at all to permanently damage the flash memory just because of a power disruption during a erase / write operation?

Best regards,
Mário

I'm no TI. But logic would dictate that anything is possible, however remote.

So I suspect if you do indeed hear back from TI on this - I highly doubt that, their answer would be yes.

Because the reverse would be unthinkable.