Can someone explain or provide reference material to the following question:
- Is the memory map an attribute of the CPUx?
- Is the memory map "stored" anywhere?
- How does the processor read or write data to the correct "memory module" such as flash or ram
- What relationship does the linker command file keyword "MEMORY" have with the term "memory map" as mentioned in the family guide?
Hi Kevin,
welcome to the forum.
- Is the memory map an attribute of the CPUx?
What do you mean with "attribute of the CPUx"?
Usually the MSP430 has 16bit address range from 0x0000 to 0xFFFF which is 64kB. As the MSP430F5xx and F6xx device can go beyond 64kB of memory the extended CPUx can address those ranges.
- Is the memory map "stored" anywhere?
You can check the available memory in the Device Descriptor Table of the datasheet. Please note, that this is not available for every device.
For the MSP430F5529 please check table 6-62 of the device MSP430F5529 datasheet. See tags "Memory 1" to "Memory 6".
The description of the peripheral descriptor can be found in the SLAU208 Users Guide , chapter 1.13.3 Peripheral Discovery Descriptor.
- How does the processor read or write data to the correct "memory module" such as flash or ram
The processor is executing code from FLASH, RAM or in some cases ROM. The program counter PC points to the next address of code to be executed. If the PC points to an invalid memory range the program can malfunction. Usually your compiler checks the code to avoid situations like this and gives a warning.
- What relationship does the linker command file keyword "MEMORY" have with the term "memory map" as mentioned in the family guide?
The device specific linker command file contains the memory locations of the device. It shows the addresses of the FLASH, RAM ... The Linker uses this command file to assign the compiled code like data, variables, constants to the respective device memory which can be Flash or RAM.
Let me know if you have further questions.
Best regards,
Andre
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