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MSP432E401Y: Maximum ADC Sample Frequency

Josh Tombs
Prodigy 90 points
Part Number: MSP432E401Y


What is the maximum sampling frequency of the ADC within the MSP432E401Y? I see from the Technical Reference Manual on page 205 that OSC0/1 can feed the clock, and that I can select a divider of /1. If I put a 25MHz crysal on OSCO, does that mean that I can collect each channel of my ADC with 25MS/s ?

I also see on pg56 of the datasheet that the system clock frequency with the ADC is nominally 16 MHz. Does this mean that my 25 MHz crystal won't work if I want to use the ADC?

  • 0
    TI__Guru**** 244400 points
    Hello Josh,

    The maximum sampling frequency of the MSP432E401Y device is 2MSPS when each ADC is being used individually. If the two are phase shifted and sync'ed then it can do a single channel at 4 MSPS.

    As you can see in the register definition for the device, the ADCCC is selected as MOSC and there is a 25MHz crystal. the maximum data rate you would be able to get is 25M/16 (as it takes 16 clock cycles for one data conversion in the 12-bit SAR ADC), which amounts to 1.5625 MSPS. The ADC can work up to 32MHz and to get this as the clock you would need to use the PLL option in the ADCCC register.
  • 0 in reply to Amit Ashara
    Prodigy 90 points
    Thanks Amit, that answers most of my questions. A follow up, if I wanted to use multiple channels with the 25M clock source, does it get multiplexed further? So that's 1.5625 MSPS per ADC? So if I had 8 channels this would be 1.5625 / 8 MSPS per channel?
  • 0 in reply to Josh Tombs
    TI__Guru**** 244400 points
    Hello Josh,

    Yes it is multiplexed. All the Analog channels share the ADC. Hence if you have N channels per ADC, the effective sampling rate will be ADCClock/(Nx16). However with two ADC's you can split the channel allocation across the two ADC's and getting double the sampling rate per ADC channel,

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