Other Parts Discussed in Thread: MSPWARE
Tool/software: Code Composer Studio
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* MSP430 CODE EXAMPLE DISCLAIMER
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* MSP430 code examples are self-contained low-level programs that typically
* demonstrate a single peripheral function or device feature in a highly
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* register values and settings such as the clock configuration and care must
* be taken when combining code from several examples to avoid potential side
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* for an API functional library-approach to peripheral configuration.
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//******************************************************************************
// MSP430FR59xx Demo - ADC12, Sample A1, AVcc Ref, Set P1.0 if A1 > 0.5*AVcc
//
// Description: A single sample is made on A1 with reference to AVcc.
// Software sets ADC12SC to start sample and conversion - ADC12SC
// automatically cleared at EOC. ADC12 internal oscillator times sample (16x)
// and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC12
// conversion complete, ADC12_ISR will force exit from LPM0 in Mainloop on
// reti. If A1 > 0.5*AVcc, P1.0 set, else reset. The full, correct handling of
// and ADC12 interrupt is shown as well.
//
//
// MSP430FR5969
// -----------------
// /|\| XIN|-
// | | |
// --|RST XOUT|-
// | |
// >---|P1.1/A1 P1.0|-->LED
//
// T. Witt / P. Thanigai
// Texas Instruments Inc.
// November 2013
// Built with IAR Embedded Workbench V5.60 & Code Composer Studio V5.5
//******************************************************************************
#include <msp430.h>
int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop WDT
// GPIO Setup
P2OUT &= ~BIT2; // Clear LED to start
P2DIR |= BIT2; // Set P1.0/LED to output
P3OUT &= ~BIT7; // Clear LED to start
P3DIR |= BIT7;
P1SEL1 = BIT0|BIT1; // Configure P1.1 for ADC
P1SEL0 = BIT0|BIT1;
// Disable the GPIO power-on default high-impedance mode to activate
// previously configured port settings
PM5CTL0 &= ~LOCKLPM5;
// Configure ADC12
ADC12CTL0 = ADC12SHT0_2 | ADC12ON| ADC12MSC; // Sampling time, S&H=16, ADC12 on
ADC12CTL1 = ADC12SHP| ADC12CONSEQ_3; // Use sampling timer
ADC12CTL2 |= ADC12RES_2; // 12-bit conversion results
ADC12MCTL0 |= ADC12INCH_0; // A1 ADC input select; Vref=AVCC
ADC12MCTL1 = ADC12INCH_1|ADC12EOS; // A1 ADC input select; Vref=AVCC
ADC12IER0 = ADC12IE0| ADC12IE1; // Enable ADC conv complete interrupt
ADC12CTL0 |= ADC12ENC | ADC12SC; // Start sampling/conversion
while (1)
{
/* __delay_cycles(5000);
ADC12CTL0 |= ADC12ENC | ADC12SC; // Start sampling/conversion
__bis_SR_register(LPM0_bits | GIE); // LPM0, ADC12_ISR will force exit
__no_operation(); // For debugger */
}
}
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = ADC12_VECTOR
__interrupt void ADC12_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(ADC12_VECTOR))) ADC12_ISR (void)
#else
#error Compiler not supported!
#endif
{
switch(__even_in_range(ADC12IV, ADC12IV_ADC12RDYIFG))
{
case ADC12IV_NONE: break; // Vector 0: No interrupt
case ADC12IV_ADC12OVIFG: break; // Vector 2: ADC12MEMx Overflow
case ADC12IV_ADC12TOVIFG: break; // Vector 4: Conversion time overflow
case ADC12IV_ADC12HIIFG: break; // Vector 6: ADC12BHI
case ADC12IV_ADC12LOIFG: break; // Vector 8: ADC12BLO
case ADC12IV_ADC12INIFG: break; // Vector 10: ADC12BIN
case ADC12IV_ADC12IFG0: // Vector 12: ADC12MEM0 Interrupt
if (ADC12MEM0 >= 0x7ff) // ADC12MEM0 = A1 > 0.5AVcc?
P2OUT |= BIT2; // P1.0 = 1
else
P2OUT &= ~BIT2; // P1.0 = 0
__bic_SR_register_on_exit(LPM0_bits); // Exit active CPU
break; // Clear CPUOFF bit from 0(SR)
case ADC12IV_ADC12IFG1: // Vector 14: ADC12MEM1
if (ADC12MEM1 >= 0x7ff) // ADC12MEM0 = A1 > 0.5AVcc?
P3OUT |= BIT7; // P1.0 = 1
else
P3OUT &= ~BIT7; // P1.0 = 0
__bic_SR_register_on_exit(LPM0_bits); // Exit active CPU
break;
case ADC12IV_ADC12IFG2: break; // Vector 16: ADC12MEM2
case ADC12IV_ADC12IFG3: break; // Vector 18: ADC12MEM3
case ADC12IV_ADC12IFG4: break; // Vector 20: ADC12MEM4
case ADC12IV_ADC12IFG5: break; // Vector 22: ADC12MEM5
case ADC12IV_ADC12IFG6: break; // Vector 24: ADC12MEM6
case ADC12IV_ADC12IFG7: break; // Vector 26: ADC12MEM7
case ADC12IV_ADC12IFG8: break; // Vector 28: ADC12MEM8
case ADC12IV_ADC12IFG9: break; // Vector 30: ADC12MEM9
case ADC12IV_ADC12IFG10: break; // Vector 32: ADC12MEM10
case ADC12IV_ADC12IFG11: break; // Vector 34: ADC12MEM11
case ADC12IV_ADC12IFG12: break; // Vector 36: ADC12MEM12
case ADC12IV_ADC12IFG13: break; // Vector 38: ADC12MEM13
case ADC12IV_ADC12IFG14: break; // Vector 40: ADC12MEM14
case ADC12IV_ADC12IFG15: break; // Vector 42: ADC12MEM15
case ADC12IV_ADC12IFG16: break; // Vector 44: ADC12MEM16
case ADC12IV_ADC12IFG17: break; // Vector 46: ADC12MEM17
case ADC12IV_ADC12IFG18: break; // Vector 48: ADC12MEM18
case ADC12IV_ADC12IFG19: break; // Vector 50: ADC12MEM19
case ADC12IV_ADC12IFG20: break; // Vector 52: ADC12MEM20
case ADC12IV_ADC12IFG21: break; // Vector 54: ADC12MEM21
case ADC12IV_ADC12IFG22: break; // Vector 56: ADC12MEM22
case ADC12IV_ADC12IFG23: break; // Vector 58: ADC12MEM23
case ADC12IV_ADC12IFG24: break; // Vector 60: ADC12MEM24
case ADC12IV_ADC12IFG25: break; // Vector 62: ADC12MEM25
case ADC12IV_ADC12IFG26: break; // Vector 64: ADC12MEM26
case ADC12IV_ADC12IFG27: break; // Vector 66: ADC12MEM27
case ADC12IV_ADC12IFG28: break; // Vector 68: ADC12MEM28
case ADC12IV_ADC12IFG29: break; // Vector 70: ADC12MEM29
case ADC12IV_ADC12IFG30: break; // Vector 72: ADC12MEM30
case ADC12IV_ADC12IFG31: break; // Vector 74: ADC12MEM31
case ADC12IV_ADC12RDYIFG: break; // Vector 76: ADC12RDY
default: break;
}
}
Given above is the code I edited from the examples given in MSPWare. I tried the Autoscan mode(sequence of channels) and it was working but the Repeat Autoscan( repeat a sequence of channels) code aboe is not working. Help me with what I have done wrong.
