MSP430FR5969: Setting PxDIR for secondary GPIO functions.

Hi Jennifer,

I think what is causing the most confusion here is the example code.  For now, ignore it.  Let's focus on answering your most pressing question, that is, do you need to set the direction of the GPIO to use these pins for SPI? - Answer is No.

Why?  As described in the datasheet table with the 'X', these mean exactly that - you don't need to set the PDIR register for the SPI.

To visualize this, lets look at the pin diagram for P1.6 and P1.7 as an example.  I annotated it to make it more clear how the PIN logic works.  Note, this is straight out of the MSP430FR5969 datasheet.

Ok, now lets look at the code that makes this possible.  I'm not going to comment on the example code because it is misleading.  Rather I'm posting the code I used on an MSP430FR6989 Launchpad to demonstrate this functionality.  Code is below.  There is a section in the beginning in between a '#if 0 ...endif' that does not get compiled by default.  The code stays in a loop writing '0xAA' as you can see in the logic probe capture.  To see what effect the PDIR register has on the SPI pins, you can make the '#if 0' to '#if 1' and configure the PDIR bits as inputs and try the code again.  You will see the SPI continues to work.  Set the PDIR bits as outputs and try again and you will see SPI continues to work.

And now for the code:

/*
* Example code showing how to initialize UCA0 SPI functionality on shared GPIO pins.
* MSP430FR6989 launch pad
*/
#include <msp430.h>
#define SOMI BIT1
#define SIMO BIT0
#define CLK BIT2

int main(void)
{

WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer

#if 0
/*
* To enable this code stub, set = #if 1
* Experiment - Set SPI GPIO pins as inputs or outputs and see if it affects SPI - It doesn't!!
*/
P2OUT = 0;

P2DIR |= (SOMI | SIMO | CLK); // Set the direction to output
// or
//P2DIR &= (SOMI | SIMO | CLK); // Set the direction to input
#endif

/*
* Select the secondary functions on these GPIO pins so they can be controlled by UCA0 SPI
*/
P2SEL0 |= (SOMI | SIMO | CLK); // Set these bits
P2SEL1 &= ~(SOMI | SIMO | CLK); // Clear these bits

PM5CTL0 &= ~LOCKLPM5; //Disable the GPIO power-on default high-impedance mode to activate previously configured port settings

/*
* Configure the UCA0 peripheral as a master SPI
*/
UCA0CTLW0 = UCSWRST; // **Put state machine in reset**
UCA0CTLW0 |= UCMST | UCSYNC |UCCKPL | UCMSB; // MASTER|Synchronous mode|inactive state-high|MSB first
UCA0CTLW0 &= ~UCCKPH; // Data changed on first UCLK, captured on following

UCA0CTLW0 |= UCSSEL__SMCLK; // Use SMCLK as clock source
UCA0BRW = 0x02; // Set bit rate clock = SMCLK / 2
UCA0CTLW0 &= ~UCSWRST; // **Initialize USCI state machine - Ready for use**

_enable_interrupts();

while(1)
{
// Wait for the SPI to be ready
while(UCA0STATW & UCBUSY);

// Send a byte
UCA0TXBUF = 0xAA;

// Create a small delay so when viewing the MOSI pin there is a gap in the logic probe.
_delay_cycles(50);

}
}

Jennifer, let me know if you understand and agree that PDIR does not need to be configured to use the SPI.  Modify this code for your device and try it.

Then we can discuss your other questions.