CCS/MSP430FR4133: Timer A interrupt issues

Tool/software: Code Composer Studio

Hello all, 

I am trying to configure Timer A to feed the dog every millisecond. Feeding the dog isn't the issue, it seems I am struggling with the ISR. The majority of my code is unrelated to this task. If something seems to be missing just let me know. Since the SMCLK is at 8Hz, the clock should count up from 0 to 8000 (hex is 1F40), which should have a period of 1 millisecond. I have identified one of the issues in the MC bit in the TA0CTL register. I have attempted to write to the register three different ways in hopes of the labels being weird in the libraries. If I remove the MC bit flip, then the code works without the interrupt every triggering. If the MC bit is included then it never reaches main. 

int main(void)
{
char buffer[50];
SYSTEMinit();
while(1)
{
char buffer[30];
sprintf(buffer,"\n\r%d",i);
writeUART(buffer);
_delay_cycles(8000000);

}
}

#pragma vector=TIMERA0_VECTOR
__interrupt void Timer_A (void)
{
i++;
}

void SYSTEMinit()
{
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
_BIS_SR(GIE);

//Timer configuration
TA0CCTL0 |= TACLR; //Clears clock
TA0CCR0 = 0x1F40; //0x1F40= 8000 which at 8 MHz is 1 ms
TA0CCTL0 |= CCIE; //Enables compare interrupt, puts timer A into compare mode
//TA0CTL |= TASSEL_2 | MC_1 | TAIE; // SMCLK, continuous mode
//TA0CTL |= TASSEL_2 + TAIE + MC0;
TA0CTL = 0x0212;

PM5CTL0 &= ~LOCKLPM5; //Lock Pins into place // disable FLL
CSCTL3 |= SELREF__REFOCLK; // Set REFO as FLL reference source
CSCTL0 = 0; // clear DCO and MOD registers
CSCTL1 &= ~(DCORSEL_7); // Clear DCO frequency select bits first
CSCTL1 |= DCORSEL_3; // Set DCO = 8MHz
CSCTL2 = FLLD_0 + 243; // DCODIV = 8MHz
CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set default REFO(~32kHz) as ACLK source, ACLK = 32768Hz
// default DCODIV as MCLK and SMCLK source
}

void UARTinit()
{
//STEP 1 Set UCSWRST Bit
UCA0CTLW0 |= UCSWRST; //Allows UART to be configured
//STEP 2 Initialize all relevant Registers
UCA0CTLW0 |= UCSSEL__SMCLK; //Choses SMCLK as clock source for UART
UCA0BR0 = 52; // 8000000/16/9600 CORRECT 9600 BAUD RATE
//UCA0BR1 = 0x00;
UCA0MCTLW = 0x4900 | UCOS16 | UCBRF_1;
//STEP 3 Configure Ports
P1SEL0 |= BIT0 + BIT1; // set 2-UART pin as Primary non I/O function
//STEP 4 SEt UCSWRST Bit
UCA0CTLW0 &= ~UCSWRST; // Initialize eUSCI
//STEP 5 ENABLE INTERUPTS
__enable_interrupt( );
UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt

_delay_cycles(4000000);
writeUART("\n\rstart");
}

int writeUART(char* sentence)
{
int i;
for (i = 0; i < strlen(sentence); i++) {
while(!(UCA0IFG&UCTXIFG));
UCA0TXBUF = sentence[i];
}
return i;
}

Thank you in advance for your help.

AJ