Other Parts Discussed in Thread: MSP430F5359
Folks:
We have a design that is currently using two MSP430F2618 microprocessors. In Section 5.2.7, "Basic Clock Module+ Fail-Safe Operation" from TI's SLAU144J document (December 2004–Revised July 2013) entitled "MSP430x2xx Family User's Guide", it is documented that a failure of the MCLK source (say, XT2 as an oscillator or external clock input) will cause the chip to automatically "fall back" to a different source (such as the DCO):
So we're covered for MCLK failures. But does the same behavior apply for SMCLK?
By the way, our design is migrating to the MSP430F5359. For that chip, the similar section in its user guide unambiguously states that yes, SMCLK "falls back":
So, does the MSP430F2618 also behave this way? (Our experimentation seems to say that it does, but we'd love to have you confirm this for us so that we can document that behavior in our source code.)
Atlant