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CCS/MSP432P401R: MSP432 DMA and hardware SPI external trigger to get external ADC's data

Part Number: MSP432P401R

Tool/software: Code Composer Studio

Hi,I have three quenstionIs.Could anybody help me?Thanks.

1). I want to use an high-speed external 24bits ADC with MSP432, is there any examples of it?

The ADC "data ready" pin should trigger the DMA to start three hardware SPI communication (because SPI can only transmit one byte each) with a new data and write it to a buffer.

Once the buffer is full, the buffer desternation address is changed (a double-buffered operation).

2).There is an example using the internal 14Bit ADC with DMA PINGPONG mode, but I can't understand the ISR code:The "MSP_EXP432P401RLP_DMAControlTable" is used for what?

__attribute__((ramfunc)) // Requires compiler TI v15.12.1.LTS
void DMA_INT1_IRQHandler(void)
{
#ifdef DEBUG
BITBAND_PERI(P2->OUT, 0) = 1;
#endif
/*
* Switch between primary and alternate bufferes with DMA's PingPong mode
*/
if (MAP_DMA_getChannelAttribute(7) & UDMA_ATTR_ALTSELECT)
{
// MAP_DMA_setChannelTransfer(UDMA_PRI_SELECT | DMA_CH7_ADC14, arrayMode,
// (void*) &ADC14->MEM[0],
// (void*)&resultsBuffer[arrayOffset],arraySize);
MSP_EXP432P401RLP_DMAControlTable[7].control =
(MSP_EXP432P401RLP_DMAControlTable[7].control & 0xff000000 ) |
(((BLOCK_SIZE)-1)<<4) | UDMA_MODE_PINGPONG;
currentRawResultPtr = primaryRawADC14;
}
else
{
// MAP_DMA_setChannelTransfer(UDMA_ALT_SELECT | DMA_CH7_ADC14, arrayMode,
// (void*)&ADC14->MEM[0],
// (void*)&resultsBuffer[arrayOffset],arraySize);
MSP_EXP432P401RLP_DMAControlTable[15].control =
(MSP_EXP432P401RLP_DMAControlTable[15].control & 0xff000000 ) |
(((BLOCK_SIZE)-1)<<4) | UDMA_MODE_PINGPONG;
currentRawResultPtr = secondaryRawADC14;
}
#ifdef DEBUG
BITBAND_PERI(P2->OUT, 0) = 0;
#endif
}

3).And There also a thread asking "DMA External Trigger by external ADC data ready-> SPI start", but I still have question about the ISR.()

Should I start the "DMA_CH6_EXTERNALPIN" interrupt or "DMA_CH1_EUSCIB0RX0"?

Thanks a lot.

  • By the way, how can I joint each three bytes' data to get 24bits value in the fastest way?
  • (1) I do not believe a specific example exists. You would need to bring together a number of examples and concepts as described here, e2e.ti.com/.../2182546
    (2) The DMA is the ARM uDMA peripheral. You can read more about it in the technical reference manual or in several ARM publications. The DMA table is the configuration of the 8 primary and 8 alternate DMA channels. In the ping-pong mode the DMA points to the configuration from the primary channel, performs the DMA operation, points to the alternate location, performs the operation, and then continues (ping-pongs) back and forth between primary and alternate. In the case of an ADC application, you could process the ‘ping’ data while the ‘pong’ is being collected and then process the ‘pong’ data while the next ‘ping’ is collected. The educational boosterpack is a good example of this dev.ti.com/.../ . The ISR is used to ‘reset’ the configuration data in the DMA table because the size is decremented and the state is changed to ‘invalid’ after the last transfer. www.ti.com/.../slau356h.pdf
    (3) The earlier post identifies three separate DMA channels. The first is channel 6 which is connected to the external pin. This ADC ready will start the process. The action of this DMA channel is to load the SPI TX buffer. Loading the TX buffer will start the SPI transaction, www.ti.com/.../slau356h.pdf. Once the value is moved from the buffer to the shift register the TXIFG would trigger the second DMA which would load the TX buffer the appropriate number of times to receive the correct number of bytes. Finally, the last DMA channel would be connected the SPI RX trigger. The DMA provides four interrupts. DMA_INT0 is a raw which would include potentially all 8 channel sources while the other three are masked to a specific channel. In this case you can map each of the three DMA channels to individual DMA interrupts. So for example when the ADC ready triggers DMA channel 6, channel 6 can be mapped to DMA interrupt 1. When DMA channel 6 is complete the DMA interrupt 1 is serviced and at this time channel can be reconfigured to respond to the next ADC ready signal. As a side note, you may want to consider using a simple GPIO interrupt to start the communication with the ADC. The DMAE0 input is level based and not edge based.

    Good luck!
    Chris
  • If there any problem if I don't use a GPIO interrupt to start the communication? I heard that the ISR may taikes 2~3us, I think it may cause sample losing. But level based DMAE0 seems can't get a precise sample rate.
  • I believe the interrupt requires 10 cycles to enter and 10 cycles to leave the ISR. I agree that DMAE0, the digital input, is not the best to guarantee sample timing. I do not see any issue with starting the data collection process outside of an interrupt.

    Chris

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