Program Execution from Ram?

//******************************************************************************
//  MSP430F543xA Demo - ADC12_A, Sample A10 Temp and Convert to oC and oF
//
//  Description: A single sample is made on A10 with reference to internal
//  1.5V Vref. Software sets ADC12SC to start sample and conversion - ADC12SC
//  automatically cleared at EOC. ADC12 internal oscillator times sample
//  and conversion. In Mainloop MSP430 waits in LPM4 to save power until
//  ADC10 conversion complete, ADC12_ISR will force exit from any LPMx in
//  Mainloop on reti.
//  ACLK = n/a, MCLK = SMCLK = default DCO ~ 1.045MHz, ADC12CLK = ADC12OSC
//
//  Uncalibrated temperature measured from device to devive will vary due to
//  slope and offset variance from device to device - please see datasheet.
//
//                MSP430F5438A
//             -----------------
//         /|\|              XIN|-
//          | |                 |
//          --|RST          XOUT|-
//            |                 |
//            |A10              |
//
//   Andreas Dannenberg
//   Texas Instruments Inc.
//   November 2009
//   Built with CCSv4 and IAR Embedded Workbench Version V4.21
//******************************************************************************
// Filename:
//   msp430x54xA_adc12_10_3.c
// Description:
//   ULP Optimizations Step 4
// Modifications (compared to original code example from TI web):
//   - (ULP 4.1) Terminate unused GPIO pins
//   - (ULP 2.1) Use timer module for delays
//   - (ULP 7.1) Moved global variables as locals into main
//   - (ULP 5.1) Moved execution of divide operations into RAM
// Current consumption:
//   246.3uA - 247.3uA
//******************************************************************************
#include "msp430x54xA.h"

volatile long temp;
//volatile long IntDegF;
//volatile long IntDegC;

#pragma CODE_SECTION(CalculateTempInCandF,".FLASHCODE")
void CalculateTempInCandF(void)
{
  volatile long IntDegF;
  volatile long IntDegC;

  IntDegC = ((temp - 1857) * 666) / 4096;
  IntDegF = ((temp - 1857) * 1199) / 4096 + 32;
}

void main(void)
{
//  volatile long IntDegF;
//  volatile long IntDegC;

  WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT

  // added per ULP Advisor info
  PAOUT  = 0;
  PADIR  = 0xFFFF;                          // P1 & P2
  PASEL  = 0;
  PBOUT  = 0;
  PBDIR  = 0xFFFF;                          // P3 & P4
  PBSEL  = 0;
  PCOUT  = 0x4000;                          // AMP_SD with R to VCC
  PCDIR  = 0xFFFF;                          // P5 & P6
  PCSEL  = 0;
  PDOUT  = 0;
  PDDIR  = 0xFFFF;                          // P7 & P8
  PDSEL  = 0;
  PEOUT  = 0;
  PEDIR  = 0xFFFF;                          // P9 & P10
  PESEL  = 0;
//  P11OUT = 0;
//  P11DIR = 0xFF;                            // P11
//  P11SEL = 0;
  PFOUT = 0;
  PFDIR = 0xFFFF;                           // ULP Advisor knows only 'letter' Ports
  PFSEL = 0;
  PJOUT  = 0;
  PJDIR  = 0xFF;                            // PJ
  
  // copy processing intensive routines into RAM
  memcpy((void*)0x1C00,(const void*)0x5C00,0x0200);

  /* Initialize the shared reference module */ 
  REFCTL0 |= REFMSTR + REFVSEL_0 + REFON;    // Enable internal 1.5V reference
  
  /* Initialize ADC12_A */ 
  ADC12CTL0 = ADC12SHT0_8 + ADC12ON;		    // Set sample time 
  ADC12CTL1 = ADC12SHP;                     // Enable sample timer
  ADC12MCTL0 = ADC12SREF_1 + ADC12INCH_10;  // ADC input ch A10 => temp sense 
  ADC12IE = 0x001;                          // ADC_IFG upon conv result-ADCMEMO
  
//  __delay_cycles(75);                       // 35us delay to allow Ref to settle
                                            // based on default DCO frequency.
                                            // See Datasheet for typical settle
                                            // time.

  TA1CTL = TASSEL_1 + TACLR;                // ACLK, clear TAR
// TA1CCR0 = 32768-1;                       // 1 second
  TA1CCR0 = (32768*2)-1;                    // 2 seconds
  TA1CCTL0 = CCIE;                          // CCR0 interrupt enabled
  TA1CTL |= MC_1;                           // Start timer in up-mode
  __bis_SR_register(LPM4_bits + GIE);       // LPM4 with interrupts enabled

  ADC12CTL0 |= ADC12ENC;

  while(1)
  {
    ADC12CTL0 |= ADC12SC;                   // Sampling and conversion start

    __bis_SR_register(LPM4_bits + GIE);     // LPM4 with interrupts enabled
    __no_operation();

/*
    // Temperature in Celsius
    // ((A10/4096*1500mV) - 680mV)*(1/2.25mV) = (A10/4096*666) - 302
    // = (A10 - 1857) * (666 / 4096)
    IntDegC = ((temp - 1857) * 666) / 4096;

    // Temperature in Fahrenheit
    // Tf = (9/5)*Tc + 32
    IntDegF = ((temp - 1857) * 1199) / 4096 + 32;
*/

    CalculateTempInCandF();

//    __no_operation();                       // SET BREAKPOINT HERE
    __bis_SR_register(LPM4_bits + GIE);       // LPM4 with interrupts enabled
  }
}

#pragma vector=ADC12_VECTOR
__interrupt void ADC12ISR (void)
{
  switch(__even_in_range(ADC12IV,34))
  {
  case  0: break;                           // Vector  0:  No interrupt
  case  2: break;                           // Vector  2:  ADC overflow
  case  4: break;                           // Vector  4:  ADC timing overflow
  case  6:                                  // Vector  6:  ADC12IFG0
    temp = ADC12MEM0;                       // Move results, IFG is cleared
    __bic_SR_register_on_exit(LPM4_bits);   // Exit active CPU
    break;
  case  8: break;                           // Vector  8:  ADC12IFG1
  case 10: break;                           // Vector 10:  ADC12IFG2
  case 12: break;                           // Vector 12:  ADC12IFG3
  case 14: break;                           // Vector 14:  ADC12IFG4
  case 16: break;                           // Vector 16:  ADC12IFG5
  case 18: break;                           // Vector 18:  ADC12IFG6
  case 20: break;                           // Vector 20:  ADC12IFG7
  case 22: break;                           // Vector 22:  ADC12IFG8
  case 24: break;                           // Vector 24:  ADC12IFG9
  case 26: break;                           // Vector 26:  ADC12IFG10
  case 28: break;                           // Vector 28:  ADC12IFG11
  case 30: break;                           // Vector 30:  ADC12IFG12
  case 32: break;                           // Vector 32:  ADC12IFG13
  case 34: break;                           // Vector 34:  ADC12IFG14
  default: break;
  }
}

// Timer A0 interrupt service routine
#pragma vector=TIMER1_A0_VECTOR
__interrupt void TIMER1_A0_ISR(void)
{
  __bic_SR_register_on_exit(LPM4_bits);     // Exit any LPM
}