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MSP430FR2433: UART UCLK source

Hisao Uchikoshi
Genius 15310 points

Part Number: MSP430FR2433

Hi Experts,

I'd like to know the source of UCLK for eUSCI UART. UCLK is required to generate baud rate by 32KHz clock since SMCLK cannot be used. There is a note on Figure 24-1 for I2C mode as below.


Can we consider that above note can also be applied to UART mode?

Regards,

Uchikoshi

 

  • 0
    Intellectual 290 points
    Please refer to table 6-7 in FR2433 device specific datasheet (page 45)
    UCLKI input is routed from external pin UCB0CLK thus you should provide external BRCLK signal in this case

    As far as I know there is no way to clock eUSCIB from 32kHz internally in this device.

    To obtain 32kHz as a BRCLK you can:
    - fan out REFO as an ACLK to external pin ACLK (port P2.2)
    - physically connect this pin with UCB0CLK (port P1.1) pin
    You can also use LFXT1 as 32kHz source if present
    Please note, that only baudrates up to 9600 would be available with 32kHz BRCLK and down to LPM3 mode

    Alternatively when you select UCSSELx = 01 (Device Specific), eUSCI_B is clocked from 5MHz MODCLK internal generator
    MODCLK is available in AM and LPM0.
    Note also that SMCLK is available in these operation modes as well along with MODCLK.

    Table 6-1 in device specific datasheet is a good hint.

    Hope it helps
  • 0 in reply to MKrasuski
    TI__Genius 15310 points

    Thank you for your answer. Now I understood that UCLK probably stands for UxxxCLK.

    Regards,

    Uchikoshi

  • 0 in reply to Hisao Uchikoshi
    Intellectual 290 points
    Please study carefully both tables I quoted in previous post as well as CS and eUSCI diagrams (figure 3-1 and figure 22-1 from FR2xx family User's guide)
    These are really helpful to understand various clock distribution schemes within the device.
    Unfortunately you have to work with both family and specific datasheets simultaneously.

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