This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hi,
Introduction:
I am using MSP430F5239 and my system requires an I2C BSL for upgrading the firmware in the field. We figured out that the default BSL in this device is timer based UART and we would need to flash a custom BSL before shipping it to our customers.
Progress so far:
To create a custom BSL, we planned to use, "MSP430BSL_1_01_00_01" provided as a reference.( CCS_v7_MSP430F522x_I2C project to be more specific.)
We figured out that "Lite FET-Pro430" was the best software to load BSL. Before starting to change the BSL project for our MSP430 device, we decided to give a shot with the default build provided with CCS_v7_MSP430F522x_I2C. To confirm if BSL was loaded correctly and is running, we sent I2C some write commands with slave address 0x48, and we saw MSP430 respond. So, we are pretty sure that we have got the BSL loaded correctly.
Is there any better suggestions that you recommend us to follow in the above steps?
Main problem:
Our next step was to load our final application binary using BSL. we came across command lime mode of BSL scripter for PC based loading, using FET Programmer.
BSL-Scripter.exe -n 5xx -i [COM26,I2C,100000] -b -w RTOSDemo.txt -v -z [SET_PC,0x4400]
We were getting an error stating, "The communication protocol chosen is not available for the chosen Family!". So we decided to look for alternate methods and came across "SimpleLink Host for MSP430 UART BSL". (Embedded programming solutions for BSL). We found host implementations only for UART and not for I2C.
Please let us know how can we proceed further. Also please share if there are any other host firmware implemented using I2C with MSP430F5229(the one used in USB2ANY)
Thanks in advance
Hi Jace,
Thanks for your suggestion of bundling both BSL and application FW as a single .txt file.
HW connection currently used is MSP-FET. But our final solution would required an embedded system to upload code via BSL (another MSP430 device - MSP430F5239). Since, we are not using the default BSL and updating it with custom BSL, we dont want both the sides (host and devices) to be untested.
Testing the custom I2C BSL with BSL Scripter and MSP-FET would be our first step. Once the custom BSL is tested to work well, we would need to start with Host implantation to load FW via BSL.
When testing with BSLScripter, we got the below error:
Error: The communication protocol chosen is not available for the chosen Family!
I feel BSL scripter only supports loading using default BSL of all families. is there a way to workaround it ?
I followed the suggestion that you had mentioned and below is the error i got.
"unknown ack value"
/* ============================================================================ */ /* Copyright (c) 2017, Texas Instruments Incorporated */ /* All rights reserved. */ /* */ /* Redistribution and use in source and binary forms, with or without */ /* modification, are permitted provided that the following conditions */ /* are met: */ /* */ /* * Redistributions of source code must retain the above copyright */ /* notice, this list of conditions and the following disclaimer. */ /* */ /* * Redistributions in binary form must reproduce the above copyright */ /* notice, this list of conditions and the following disclaimer in the */ /* documentation and/or other materials provided with the distribution. */ /* */ /* * Neither the name of Texas Instruments Incorporated nor the names of */ /* its contributors may be used to endorse or promote products derived */ /* from this software without specific prior written permission. */ /* */ /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ /* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ /* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ /* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ /* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ /* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ /* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ /* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ /* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ /* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* ============================================================================ */ /******************************************************************************/ /* lnk_msp430f5229.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5229 PROGRAMS */ /* */ /* Usage: lnk430 <obj files...> -o <out file> -m <map file> lnk.cmd */ /* cl430 <src files...> -z -o <out file> -m <map file> lnk.cmd */ /* */ /*----------------------------------------------------------------------------*/ /* These linker options are for command line linking only. For IDE linking, */ /* you should set your linker options in Project Properties */ /* -c LINK USING C CONVENTIONS */ /* -stack 0x0100 SOFTWARE STACK SIZE */ /* -heap 0x0100 HEAP AREA SIZE */ /* */ /*----------------------------------------------------------------------------*/ /* Version: 1.204 */ /*----------------------------------------------------------------------------*/ /****************************************************************************/ /* Specify the system memory map */ /****************************************************************************/ MEMORY { SFR : origin = 0x0000, length = 0x0010 PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 RAM : origin = 0x2400, length = 0x2000 INFOA : origin = 0x1980, length = 0x0080 INFOB : origin = 0x1900, length = 0x0080 INFOC : origin = 0x1880, length = 0x0080 INFOD : origin = 0x1800, length = 0x0080 ZAREA : origin = 0x1000, length = 0x0010 BSL430_VERSION_VENDOR : origin = 0x1010, length = 0x0001 BSL430_VERSION_CI : origin = 0x1011, length = 0x0001 BSL430_VERSION_API : origin = 0x1012, length = 0x0001 BSL430_VERSION_PI : origin = 0x1013, length = 0x0001 ZAREA_CODE : origin = 0x1014, length = 0x002E FLASH : origin = 0x1042, length = 0x07AE BSLSIG : origin = 0x17F0, length = 0x000C JTAGLOCK_KEY : origin = 0x17FC, length = 0x0004 FLASH2 : origin = 0x4400, length = 0x8000 INT00 : origin = 0xFF80, length = 0x0002 INT01 : origin = 0xFF82, length = 0x0002 INT02 : origin = 0xFF84, length = 0x0002 INT03 : origin = 0xFF86, length = 0x0002 INT04 : origin = 0xFF88, length = 0x0002 INT05 : origin = 0xFF8A, length = 0x0002 INT06 : origin = 0xFF8C, length = 0x0002 INT07 : origin = 0xFF8E, length = 0x0002 INT08 : origin = 0xFF90, length = 0x0002 INT09 : origin = 0xFF92, length = 0x0002 INT10 : origin = 0xFF94, length = 0x0002 INT11 : origin = 0xFF96, length = 0x0002 INT12 : origin = 0xFF98, length = 0x0002 INT13 : origin = 0xFF9A, length = 0x0002 INT14 : origin = 0xFF9C, length = 0x0002 INT15 : origin = 0xFF9E, length = 0x0002 INT16 : origin = 0xFFA0, length = 0x0002 INT17 : origin = 0xFFA2, length = 0x0002 INT18 : origin = 0xFFA4, length = 0x0002 INT19 : origin = 0xFFA6, length = 0x0002 INT20 : origin = 0xFFA8, length = 0x0002 INT21 : origin = 0xFFAA, length = 0x0002 INT22 : origin = 0xFFAC, length = 0x0002 INT23 : origin = 0xFFAE, length = 0x0002 INT24 : origin = 0xFFB0, length = 0x0002 INT25 : origin = 0xFFB2, length = 0x0002 INT26 : origin = 0xFFB4, length = 0x0002 INT27 : origin = 0xFFB6, length = 0x0002 INT28 : origin = 0xFFB8, length = 0x0002 INT29 : origin = 0xFFBA, length = 0x0002 INT30 : origin = 0xFFBC, length = 0x0002 INT31 : origin = 0xFFBE, length = 0x0002 INT32 : origin = 0xFFC0, length = 0x0002 INT33 : origin = 0xFFC2, length = 0x0002 INT34 : origin = 0xFFC4, length = 0x0002 INT35 : origin = 0xFFC6, length = 0x0002 INT36 : origin = 0xFFC8, length = 0x0002 INT37 : origin = 0xFFCA, length = 0x0002 INT38 : origin = 0xFFCC, length = 0x0002 INT39 : origin = 0xFFCE, length = 0x0002 INT40 : origin = 0xFFD0, length = 0x0002 INT41 : origin = 0xFFD2, length = 0x0002 INT42 : origin = 0xFFD4, length = 0x0002 INT43 : origin = 0xFFD6, length = 0x0002 INT44 : origin = 0xFFD8, length = 0x0002 INT45 : origin = 0xFFDA, length = 0x0002 INT46 : origin = 0xFFDC, length = 0x0002 INT47 : origin = 0xFFDE, length = 0x0002 INT48 : origin = 0xFFE0, length = 0x0002 INT49 : origin = 0xFFE2, length = 0x0002 INT50 : origin = 0xFFE4, length = 0x0002 INT51 : origin = 0xFFE6, length = 0x0002 INT52 : origin = 0xFFE8, length = 0x0002 INT53 : origin = 0xFFEA, length = 0x0002 INT54 : origin = 0xFFEC, length = 0x0002 INT55 : origin = 0xFFEE, length = 0x0002 INT56 : origin = 0xFFF0, length = 0x0002 INT57 : origin = 0xFFF2, length = 0x0002 INT58 : origin = 0xFFF4, length = 0x0002 INT59 : origin = 0xFFF6, length = 0x0002 INT60 : origin = 0xFFF8, length = 0x0002 INT61 : origin = 0xFFFA, length = 0x0002 INT62 : origin = 0xFFFC, length = 0x0002 RESET : origin = 0xFFFE, length = 0x0002 } /****************************************************************************/ /* Specify the sections allocation into memory */ /****************************************************************************/ SECTIONS { .bss : {} > RAM /* Global & static vars */ .data : {} > RAM /* Global & static vars */ .TI.noinit : {} > RAM /* For #pragma noinit */ .sysmem : {} > RAM /* Dynamic memory allocation area */ .stack : {} > RAM (HIGH) /* Software system stack */ .ZAREA : {} > ZAREA .BSL430_VERSION_VENDOR : {} > BSL430_VERSION_VENDOR .BSL430_VERSION_CI : {} > BSL430_VERSION_CI .BSL430_VERSION_API : {} > BSL430_VERSION_API .BSL430_VERSION_PI : {} > BSL430_VERSION_PI .ZAREA_CODE : {} > ZAREA_CODE .BSLSIG : {} > BSLSIG .JTAGLOCK_KEY : {} > JTAGLOCK_KEY .text : {}>> FLASH | FLASH2 /* CODE */ .text:_isr : {} > FLASH /* ISR CODE SPACE */ .cinit : {} > FLASH | FLASH2 /* INITIALIZATION TABLES */ .const : {} > FLASH | FLASH2 /* CONSTANT DATA */ .cio : {} > RAM /* C I/O BUFFER */ .pinit : {} > FLASH /* C++ CONSTRUCTOR TABLES */ .init_array : {} > FLASH /* C++ CONSTRUCTOR TABLES */ .mspabi.exidx : {} > FLASH /* C++ CONSTRUCTOR TABLES */ .mspabi.extab : {} > FLASH /* C++ CONSTRUCTOR TABLES */ .infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */ .infoB : {} > INFOB .infoC : {} > INFOC .infoD : {} > INFOD /* MSP430 Interrupt vectors */ .int00 : {} > INT00 .int01 : {} > INT01 .int02 : {} > INT02 .int03 : {} > INT03 .int04 : {} > INT04 .int05 : {} > INT05 .int06 : {} > INT06 .int07 : {} > INT07 .int08 : {} > INT08 .int09 : {} > INT09 .int10 : {} > INT10 .int11 : {} > INT11 .int12 : {} > INT12 .int13 : {} > INT13 .int14 : {} > INT14 .int15 : {} > INT15 .int16 : {} > INT16 .int17 : {} > INT17 .int18 : {} > INT18 .int19 : {} > INT19 .int20 : {} > INT20 .int21 : {} > INT21 .int22 : {} > INT22 .int23 : {} > INT23 .int24 : {} > INT24 .int25 : {} > INT25 .int26 : {} > INT26 .int27 : {} > INT27 .int28 : {} > INT28 .int29 : {} > INT29 .int30 : {} > INT30 .int31 : {} > INT31 .int32 : {} > INT32 .int33 : {} > INT33 .int34 : {} > INT34 .int35 : {} > INT35 .int36 : {} > INT36 .int37 : {} > INT37 .int38 : {} > INT38 .int39 : {} > INT39 .int40 : {} > INT40 RTC : { * ( .int41 ) } > INT41 type = VECT_INIT PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT DMA : { * ( .int50 ) } > INT50 type = VECT_INIT .int51 : {} > INT51 TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT ADC10 : { * ( .int54 ) } > INT54 type = VECT_INIT USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT WDT : { * ( .int57 ) } > INT57 type = VECT_INIT TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT .reset : {} > RESET /* MSP430 Reset vector */ } /****************************************************************************/ /* Include peripherals memory map */ /****************************************************************************/ -l msp430f5229.cmd
I am also attaching the attaching the BSL binary file, Password file used and the .cmd used for building custom BSL.
Note: I am using the same cmd file provided for MSP430F5229 to create the binary for MSP430F5239 as well.
@1010 00 08 08 94 @1042 81 00 00 44 B0 13 8C 44 0C 93 02 24 B0 13 F0 16 0C 43 B0 13 24 13 1C 43 B0 13 98 44 32 D0 10 00 FD 3F 03 43 F1 03 1F 43 00 18 5F 52 10 26 2E 00 10 26 5C 4E 03 00 0D 43 B0 13 1C 44 2E 00 10 26 5E 4E 02 00 0C DE B0 13 1C 44 6E 4F 0C DE 2B 00 10 26 6E 4B 3E 80 10 00 3E 90 0C 00 85 2C 5E 06 4E 0E 4E 0D 00 18 50 4E AC 10 DC 11 00 00 8A 11 00 00 54 11 00 00 3A 11 00 00 AA 11 00 00 D4 11 00 00 00 11 00 00 DC 10 00 00 CA 11 00 00 BA 11 00 00 AA 11 00 00 B6 11 00 00 B2 90 A5 A5 1A 26 3C 20 0F 18 4D 5D 00 18 4D DC 4D 13 0C 43 B0 13 EE 11 CF 4C 01 00 2C 43 B0 13 44 16 75 3C B0 13 FE 11 CF 01 B0 13 9C 16 2C 92 11 24 B0 13 0E 12 FF 40 3A 00 00 00 B0 13 0E 12 EF 41 01 00 B0 13 0E 12 DF 41 01 00 02 00 3C 40 03 00 E5 3F B0 13 EE 11 EF 42 01 00 DF 3F B2 90 A5 A5 1A 26 0D 20 3F 40 10 00 1F F2 44 01 1F 52 1C 26 3F 50 40 00 18 3C B2 90 A5 A5 1A 26 02 24 2C 42 C8 3F 92 42 1C 26 44 01 2F 43 1F 52 1C 26 82 4F 40 01 0F 18 4D 5D 00 18 4D DC CD 43 00 00 3F 40 10 00 1F 52 1C 26 82 4F 44 01 B2 3F CC 0F B0 13 8A 17 4C 93 05 20 B0 13 EE 11 CF 43 01 00 AD 3F B0 13 EE 11 FF 40 05 00 01 00 A7 3F B0 13 EE 11 FF 40 07 00 01 00 A1 3F 5F 43 12 3C 8F 00 10 10 0C 4F 0F 19 4F 10 0D 4F 2E 42 02 3C B0 13 FE 11 B0 13 D8 14 0B 3C B0 13 3E 44 4C 4C 8A 3F 4F 43 2E 42 00 18 5E 52 10 26 B0 13 D0 15 E1 03 10 01 B0 13 0E 12 FF 40 3B 00 00 00 B0 13 0E 12 10 01 5F 4B 04 00 5E 4B 05 00 47 18 0E 5E 0E DF 10 01 2F 00 14 26 10 01 5F 42 0E 26 F2 40 55 00 0F 26 F2 40 55 00 00 24 B0 13 1A 13 82 93 22 26 0E 20 7F 90 80 00 6B 24 F2 40 51 00 0F 26 F2 40 51 00 00 24 E2 43 1E 26 B0 13 1A 13 10 01 92 93 22 26 5A 24 A2 93 22 26 3A 24 1E 42 22 26 1E 82 18 26 3E 90 03 00 2F 24 2E 92 26 20 4F 4F 47 18 0F 5F 82 DF 20 26 1D 42 20 26 B2 43 54 01 82 93 18 26 09 24 8E 00 0A 25 0F 43 F2 4E 52 01 1F 53 1F 92 18 26 FA 2B 82 9D 54 01 07 24 F2 40 52 00 0F 26 F2 40 52 00 00 24 CD 3F C2 43 0F 26 C2 43 00 24 D2 43 1E 26 C8 3F 1E 42 22 26 3E 80 03 00 CE 4F 0A 25 24 3C 4F 4F 82 4F 20 26 20 3C 4F 4F 47 18 0F 5F 82 DF 18 26 82 93 18 26 08 20 F2 40 53 00 0F 26 F2 40 53 00 00 24 B0 13 10 13 B2 90 05 01 18 26 0C 28 F2 40 54 00 0F 26 F2 40 54 00 00 24 B0 13 10 13 03 3C 4F 4F 82 4F 18 26 92 53 22 26 10 01 B0 13 1A 13 E2 43 1E 26 10 01 92 43 24 26 82 43 26 26 10 01 0F 41 3F 80 00 24 0E 4F CF 0E AF 00 FE 23 8F 43 00 00 FF 03 FE 03 0E 93 FA 23 82 43 1A 26 B2 40 00 A5 1C 26 F2 40 A5 00 21 01 92 C3 30 01 C2 43 21 01 00 18 F2 40 0A 25 10 26 00 18 F2 40 04 24 14 26 82 43 22 26 B2 40 33 02 68 01 82 43 60 01 B2 40 40 00 62 01 82 43 6A 01 B2 40 3C 20 64 01 F2 D0 06 00 2B 02 D2 D3 20 06 F2 40 07 00 21 06 B2 40 48 00 30 06 D2 C3 20 06 F2 D0 0F 00 3C 06 C2 43 1E 26 1F 42 3E 06 3F 80 06 00 1C 24 2F 82 14 24 2F 83 1C 20 92 92 24 26 26 26 06 28 82 43 24 26 F2 40 55 00 2E 06 12 3C 1F 42 26 26 D2 4F 00 24 2E 06 92 53 26 26 0A 3C D2 42 2C 06 0E 26 B0 13 14 12 04 3C 82 43 26 26 82 43 22 26 C2 93 1E 26 D8 27 5F 42 1E 26 1F B3 D2 27 B0 13 66 10 CF 3F 03 43 6A 14 CB 0C 1F 42 18 26 2F 82 C9 0F 0A 43 09 5B 0A 6D C7 0B C6 0D C8 07 CC 06 08 5F 0C 63 06 9C 05 28 02 20 07 98 02 28 0C 43 50 3C 18 43 08 FB 08 93 26 20 C5 07 CC 06 05 8F 0C 73 05 8B 0C 7D 3C 93 02 20 35 93 1C 24 2C 4E B2 90 A5 A5 1A 26 12 20 C5 06 0F 18 45 55 00 18 45 D7 85 4C 00 00 C5 06 0F 18 45 55 00 18 45 D7 2C 95 02 20 0C 43 03 3C 1C 43 01 3C 2C 42 EE 03 17 53 06 63 1D 3C 64 4E 45 44 B2 90 A5 A5 1A 26 14 20 CC 06 0F 18 4C 5C 00 18 4C D7 CC 44 00 00 CC 06 0F 18 4C 5C 00 18 4C D7 6C 4C 4C 4C 05 9C 02 20 0C 43 03 3C 1C 43 01 3C 2C 42 AE 00 01 00 0C 93 07 20 17 53 06 63 06 9A B5 2B 02 20 07 99 B2 2B 64 16 10 01 3A 14 C8 0C 09 43 C7 0E 07 58 09 6D 0B 43 2D 3C CF 07 CE 09 0F 88 0E 7D 05 20 3F 90 04 01 02 2C CA 0F 02 3C 3A 40 03 01 1F 43 00 18 5F 52 14 26 CC 08 CE 0A B0 13 44 17 4B 4C 0B 93 08 20 2F 00 14 26 FF 40 3A 00 00 00 1C 43 0C 5A 0A 3C 2F 00 14 26 FF 40 3B 00 00 00 2F 00 14 26 CF 4B 01 00 2C 43 B0 13 44 16 08 5A 0D 63 0F 43 0D 99 04 28 02 20 08 97 01 28 1F 43 0F DB 0F 93 C9 27 37 16 10 01 2A 14 78 4C 09 43 14 3C 0B 4B CE 0D FE 0B BE 00 01 00 AD 00 01 00 FD 4E FF FF 1F 83 FA 23 04 3C AD 00 01 00 FD 4C FF FF 58 03 19 53 39 92 E9 37 18 B3 F6 23 7B 4C 7F 4C CE 0B 5E 0E CB 0F 5B 0F 3B F0 0F 00 0B DE 3F F0 0F 00 3F 50 03 00 3F 90 12 00 0C 20 7E 4C 3E B0 80 00 07 24 7A 4C 3E F0 7F 00 4A 4A 46 18 0A 5A 0E DA 0F 5E 3B 90 FF 0F CB 23 28 16 10 01 1A 14 CA 0F B2 90 A5 A5 1A 26 02 24 2F 42 0A 3C 92 42 1C 26 44 01 3F 40 40 00 1F 52 1C 26 82 4F 40 01 0F 43 0B 43 B2 90 05 00 18 26 01 28 1B 43 09 43 0F 93 01 20 19 43 09 BB 03 24 B0 13 08 14 4F 4C 4A 93 0C 20 2E 00 14 26 FE 40 3B 00 00 00 2E 00 14 26 CE 4F 01 00 2C 43 B0 13 44 16 92 42 1C 26 40 01 3F 40 10 00 1F 52 1C 26 82 4F 44 01 19 16 10 01 D2 42 0F 26 00 24 F2 40 80 00 01 24 C2 4C 02 24 CF 0C 8F 10 8F 11 C2 4F 03 24 B2 43 54 01 1C 93 07 38 2F 00 14 26 CE 0C F2 4F 52 01 1E 83 FC 23 1F 42 54 01 CE 0C 2E 52 CE 4F 00 24 8F 10 8F 11 CE 0C 3E 50 05 00 CE 4F 00 24 3C 50 06 00 82 4C 24 26 82 43 26 26 10 01 2A 14 B2 43 54 01 0B 43 CA 0E 0A 5C 0B 6D C8 0C C9 0D 08 5E 09 63 0D 99 03 28 16 20 0C 98 14 2C B2 90 A5 A5 1A 26 02 24 2C 42 12 3C CE 0D 0F 18 4E 5E 00 18 4E DC E2 4E 52 01 1C 53 0D 63 0D 9B EF 2B 02 20 0C 9A EC 2B 9F 42 54 01 00 00 0C 43 28 16 10 01 2A 14 40 18 1A 42 5C 01 40 18 B2 40 80 5A 5C 01 8F 00 A0 44 9F 00 AC 44 13 24 89 00 BA 44 88 00 CA 44 0C 3C 0C 09 7F 4C 5F 06 00 18 5F 4F A0 44 A9 00 04 00 0D 09 4F 13 A9 00 04 00 D9 08 F2 23 7A C2 3A D0 08 5A 40 18 82 4A 5C 01 B0 13 9E 44 28 16 10 01 1A 14 CB 0C 0B 5E CE 0D 0E 63 1B 83 0E 73 13 3C B2 90 A5 A5 1A 26 02 24 6C 42 13 3C CA 0B 0A 8C 09 4A E9 0F CA 0E 0F 18 4A 5A 00 18 4A DB E9 4A 00 00 1B 83 0E 73 0E 9D 03 28 EA 23 0B 9C E8 2F 4C 43 19 16 10 01 F1 03 3B 40 20 00 0E 43 3D 40 E0 FF 7F 4C 7F ED 0E DF 1B 83 FB 23 0E 93 05 24 B0 13 3E 44 7C 40 05 00 0D 3C B1 40 FF 7F 00 00 02 3C 91 83 00 00 91 93 00 00 FB 37 B2 40 A5 A5 1A 26 4C 43 E1 03 10 01 1F 4C 01 00 1E 4C 03 00 0E 93 02 20 0F 93 09 24 AD 00 01 00 CD 43 FF FF 1F 83 0E 73 F9 23 0F 93 F7 23 10 01 @17fc FF FF FF FF @4400 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 10 01 92 42 1C 26 44 01 3F 40 06 00 1F 52 1C 26 82 4F 40 01 3F 40 E0 FF CF 43 00 00 3F 40 10 00 1F 52 1C 26 82 4F 44 01 4C 43 10 01 CF 0C CC 0D CD 0F AD 00 05 00 1E 4F 01 00 80 00 7A 44 0E 93 06 24 AC 00 01 00 FC 4D FF FF 1E 83 FA 23 10 01 B2 40 80 5A 5C 01 32 C2 03 43 10 01 03 43 FF 3F 03 43 10 01 CC 17 00 00 5A 15 00 00 68 44 00 00 01 01 00 00 06 FF F0 00 00 00 10 02 00 00 AC 44 00 00 1E 26 00 00 B4 44 00 00 00 24 00 00 @ffd2 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 @ffe8 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 42 10 q
@FFE0 5E 10 5E 10 5E 10 FF FF 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 5E 10 42 10 q
**Attention** This is a public forum