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MSP430FR6989: Measures against electrostatic noise at TEST terminal

Cruijff
Expert 2760 points
Part Number: MSP430FR6989
Other Parts Discussed in Thread: MSP430FR6879, MSP430F5329

My customers are developing products using MSP430FR6989.
When testing with static electricity noise applied on the pattern of the TEST terminal of the customer board, the current consumption of the MSP430 seems to be increased.

<Purpose of electrostatic test>
The customer's board is exposed to the outside of the cabinet and there is a possibility that the human body touches the board body.

<Phenomenon>
When static electricity noise was applied to the "TEST" terminal of the MSP430, the phenomenon occurred that current consumption temporarily increased current consumption.
It seems that 2.5 KV is applied by contact discharge.
※ Increase about 220uA, do not return to normal value by external reset (external reset by RST pin), return to normal value by turning on the power supply again

<Remarks>
I have already informed my customer of "MSP430 System-Level ESD Considerations".

<Question>
1. I thought that my customer test method violates Absolute Maximum Ratings and ESD Ratings in the data sheet. Is my way of thinking correct?

2. Is there a method for protecting static electricity while using the JTAG function in the state of board exposed like customer's system?
If so, what is the countermeasure method?

3. If you do not use the JTAG function and install static electricity countermeasures on the TEST terminal, is there a recommended ESD protection IC?

4. If it is BSL (UART), I think that firmware update is possible without using the TEST terminal, is it correct?
(It builds the program counter to read the BSL address with application software.)

Please tell me.
Best regards.
Cruijff

  • 0
    TI__Genius 12315 points

    Hi Cruijff,

    Thanks for your detail post. The HBM ESD rating of MSP430 is +/-1000V. It seems the customer's ESD testing exceeds this rating. This will cause unexpected behavior of device and need system level ESD protection. I will discuss this issue with team and give a further feedback by the end of this week.

    B.R

    Winter  

  • 0 in reply to Winter Yu
    Expert 2760 points

    Hi Winter,

    Thank you for responding to my question.

    I got the following question from my customer.
    Would you please investigate this additionally?

    Does this problem of ESD noise have the type that consumption current continues to increase in MSP430 series as well as type that does not increase?

    The customer changed the MSP430 of the device on the same board and verified.
    As a result, the following current consumption increase occurred.

    • MSP430FR6879 (FRAM type) · · · The current is increased by 220uA
    • MSP430FR6989 (FRAM type) · · · The current is be increased by 220 μA
    • MSP430F5329 (Flash type) · · · Returns to normal value in 1 ~ 3 seconds after the current increases by 220uA

    It seems to return to normal if it is Flash type.
    Is there relevance in FRAM or Flash?

    I seem that my customers thought that FRAM has weaker noise immunity.
    Please tell me the idea that can eliminate this thought.

    I am waiting for your team menber feedback.
    Best regards.
    Cruijff

  • 0
    TI__Genius 12315 points

    Hi Cruijff,

    <Question>

    1. I thought that my customer test method violates Absolute Maximum Ratings and ESD Ratings in the data sheet. Is my way of thinking correct?

    Yes, you are right. The testing violates ESD Ratings in the data sheet. This may lead unexpected damage or malfunction of device, including increased leakage current, deadlock state of device. The deadlock state may lead device stay in Active Mode, which also increase power consumption.

    Please see the MSP430 System-Level ESD considerations for more details. 


    2. Is there a method for protecting static electricity while using the JTAG function in the state of board exposed like customer's system?

    If so, what is the countermeasure method?

    To protect device from ESD, there are ESD protection IC, TVS. See above app note as well.

    3. If you do not use the JTAG function and install static electricity countermeasures on the TEST terminal, is there a recommended ESD protection IC?

    You need choose the ESD protection IC based your system-level ESD requirements from TI ESD protection & TVS surge diodes portfolio.   

    4. If it is BSL (UART), I think that firmware update is possible without using the TEST terminal, is it correct?

    (It builds the program counter to read the BSL address with application software.)

    Yes, it's correct. For FRAM based BSL,  the entry sequence can be implemented by user defined IO. See MSP430 FRAM Device Bootloader (BSL) User's Guide (Rev. P).

    B.R

    Winter

  • 0 in reply to Cruijff
    TI__Genius 12315 points
    Hi Cruijff,

    As above reply, the ESD failure is complicated and unexpected, the consumption current increase is only one possible result and can be continuous or transient. It's also affected by software.
    I think we can't make conclusion that FRAM has weaker noise immunity from customer's testing with a small amount of sample. The performance with over-specs condition of device, is not what customer should consider and put in system design. Besides, the current consumption return to normal value doesn't mean device return to normal, ESD may cause potential damage.
    The Fash or FRAM memory is not the root cause which increases the current consumption when ESD failure.

    B.R
    Winter
  • 0 in reply to Winter Yu
    Expert 2760 points

    Hi Winter,

    Thank you for checking.

    I’ll tell my customers that they are violating ESD Ratings.
    And, I’ll tell my customers that it can not be said that there is a difference between FRAM and Flash.

    Thank you for everything.

    Cruijff

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