Part Number: MSP432P401R
Dear forum members,
This should be a simple question, but I have not found a diagram that answers it for me, so I'm posting to the experts!
The MSP432 contains a DWT as part of the Cortex-M4F core. Since it is part of the ARM core itself, I believe that it will run off MCLK. Is this correct?
I'm asking because there are other peripherals on the MSP432 that can be run from a variety of clock sources (e.g. HSMCLK, SMCLK, ACLK, BCLK...).
I'm driving the other peripherals off SMCLK, and there is a limitation that says that the SMCLK must be 1/2 of HSMCLK up to a maximum of 24 MHz. Therefore, my SMCLK is being derived from DCO_CLK of 48 MHz, and divided by 2 to give me an SMCLK of 24 MHz.
I'm trying to determine what other peripheral configurations this might impact. I do not believe the DWT is affected by this change, but that assumes that everything in the Cortex-M core runs off MCLK. There are times when I use the cycle counter in the DWT for measuring some low-level elapsed time or creating a short delay.
Is this correct that the DWT always uses MCLK as its source, or am I missing something? If you can point me to some documentation that shows the clock configuration for the Cortex-M itself, that would be extremely helpful.
Many thanks for your time and assistance!
Scott
