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Hi,
Do you have any example which shows how to have ISRs in RAM (link and load to flash but execute from RAM)? I understand how to relocate the vector table to top of RAM, but I'm trying to execute all or part of my ISRs from RAM as well without fetching anything from FRAM on an LPM wake up.
I'm using IAR compiler tools, if you could point me to such an example it would help.
Also I'm trying to see if there is a way to find out which peripheral (maskable) interrupt occured, for ex:- if I point a few of peripheral interrupts to a same handler, is there a way for me to identify which interrupt occurred within the handler? In short I'm looking for something similar to SYSSNIV/SYSUNIV but for maskable peripheral interrupts.
Best Regards
Santosh Athuru
Hi,
please try this
// Example ISR showing how to place ISRs to run from RAM
// This must be done if you don't want the ISR to incur the
// wake from FRAM penalty from the workaround.
// Ensure PMM29_workaround.c is included in the project.
// Port 1 interrupt service routine for CCS
#pragma CODE_SECTION(PORT_1_ISR, ".TI.ramfunc")
#pragma vector=PORT1_VECTOR
__interrupt void PORT_1_ISR(void)
{
}
Hi Dietmar,
thanks for your response, yes figured out the first one. The second one I understand that the only way to figure out the source of interrupt is to go read the flags from each peripheral, but while doing this there could be more flags set. A single register which could be read would have helped the application better.
Thanks again for your support. We can close this thread.
Best regards
Santosh Athuru
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