MSP432E401Y: ADC clock frequency and sample and hold time modification using Driverlib functions

Part Number: MSP432E401Y

From the driverlib ADC examples I typically see initialization code similar to the following:

*******************************************************

/* Configure the system clock for 120 MHz */
systemClock = MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN |
SYSCTL_USE_PLL | SYSCTL_CFG_VCO_480),
120000000);

/* Enable the clock to GPIO Port E and wait for it to be ready */
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
while(!(MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOE)))
{
}

/* Configure PE0-PE3 as ADC input channel */
MAP_GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_3);
MAP_GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_2);
MAP_GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_1);
MAP_GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_0);

/* Enable the clock to ADC-0 and wait for it to be ready */
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
while(!(MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_ADC0)))
{
}

***********************************************

For these cases

1), what is the ADC clock frequency 

2) What is the default Sample and Hold width in ADC clocks

Any available examples on using the driverlib API guide function 'ADCClockConfigSet()'?

Thanks

David Nyarko