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MSP430F6777: About the signal width input to the reset pin.

da
Expert 2780 points
Part Number: MSP430F6777

Hello,

I have a question about the signal width input to the reset terminal.


The data sheet defines the minimum pulse width for reset (tRESET).
If this pulse width is shorter than specified, what kind of operation will be?
I thought it would not be recognized as a reset, but is that okay?

Regards,
Da

  • 0
    TI__Intellectual 1000 points
    Hi da,

    If this pulse width is shorter than specified, the device may go into an uncertain state (may can't work).
    The pulse duration is for ensuring all logic have been reset.

    Regards,
    Stanford
  • 0 in reply to Stanford Li
    Expert 2780 points

    Thank you for your reply.

    Is there a situation where WDT does not work?

    Regards,
    Da

  • 0 in reply to da
    TI__Intellectual 1000 points
    Hi da,

    Do you mean the pulse width is shorter than specified cause WDT does not work?
    The pulse width is shorter than specified on Reset may cause any logic can't work, this is unpredictable.
  • 0 in reply to Stanford Li
    Expert 2780 points
    Hi Stanford Li,

    There is a problem that the device hangs up when noise is input.
    Changing the reset pull-up resistance changes the problem rate.
    (If the resistance of the pull-up resistor is lowered, problems will not occur easily.)


    It would be nice if there was a way to recover automatically,
    but would it be difficult if the logic didn't work?
  • 0 in reply to da
    TI__Intellectual 1000 points
    Hi da,

    Can you show some picture about the reset pin noise captured by oscilloscope?
    BTW, how much the pull-up resistance you used?
  • 0 in reply to Stanford Li
    Expert 2780 points
    Hallo, Stanford Li


    The pull-up resistors on the reset pin are as follows.
    10 kΩ: There is a high possibility of problems.
    2.4 kΩ: There is a high possibility that the problem will not occur.

    Pulling down the TEST pin with a capacitor (0.1 uF) no longer causes problems.
    The device may be in JTAG/SBW mode.

    Since TEST pin is low by internal pull-down, it is considered that
    JTAG/SBW mode will be released after stopping noise input.

    If JTAG/SBW mode is released, will it return to normal processing?
    Or do you need a hardware reset?
    In addition, is there any way to confirm the transition to JTAG/SBW mode?


    Is it possible to send pictures directly?

    Regards,
    Da
  • 0 in reply to da
    TI__Intellectual 1000 points

    Hi da,

    Only a special sequences on the TEST and RST/NMI pins enables the JTAG function. So if you only pull down/up the TEST, the device will not be in JTAG/SBW mode.

    BTW, could you share your schematic of MCU hardware design? Where is the glitch or noise from on the RESET pin?

  • 0 in reply to Stanford Li
    Expert 2780 points

    Hello,

    This is a block diagram around RST and TEST pins.


    At least 1MHz noise is applied to the RST and TEST pins.

    If the pull-up resistor on the RST pin is 10kΩ, many problems occur, and if it is 2.4kΩ,
    the problem is reduced.
    Although there is a reset IC on the board, problems occur even if the reset IC is removed.

    Adding a capacitor (0.1 uF) to the TEST pin with a pull-down will eliminate the problem.

    It means that it does not go into JTAG mode, but if you go into JTAG mode and get
    out of JTAG mode, do you know what the MSP430 will look like?

    Regards,
    Da

  • 0 in reply to da
    TI__Intellectual 1000 points

    Hi da,

    Could you capture the voltage wave on the RST and TEST and power pin by using Oscilloscope?

    For JTAG mode or BSL mode, it needs critical timing and sequence, like below picture:

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