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MSP430F5659: Differences between Rev A & B

Guru 10750 points
Part Number: MSP430F5659


Hi,

We where using the Rev A of the MSP430F5659 and everything worked fine, we lately moved to the Rev B. and the boards are not working correctly means that the SW is stuck, is there any reason for that? any differences between the Rev A and B?

We are using external 19.2MHz clock, the SW is working fine with the internal clock but when moving to the external (XT2) the SW is stuck,

Many Thanks,

HRi

  • Hello,

    For differences between device revisions, you can refer to the erratasheet which can be found on the device's product folder.

    Looking at the erratasheet, Rev B seems to have fixed two errata from Rev A, but these fixes don't seem to be related to XT2. So, assuming your board layout and components are the same and only the MSP430F5659 Rev B has been swapped for Rev A, I suspect that your effective load capacitance for XT2 was at the limit and the Rev B device may have slightly lower or higher integrated load capacitance than Rev A devices. According to the datasheet, this integrated load capacitance is approximately (or typically) 1pF.

    In your code, it's probably getting halted where it's checking the XT2 oscillator fault flag which could be set due to incorrect load capacitance. I would double-check your external load capacitors for XT2 are correct. A great reference is the MSP430™ 32-kHz Crystal Oscillators app note.

    Also, make sure the XT2DRIVE bits select the frequency range of operation of XT2.

    Regards,

    James

  • Hi James,

    OK, will check the external load capacitors and will change the XT2DRIVE bits to 0x10 to reflect the 19.2MHz,

    Will update,

    Many Thanks,

    HRi

  • Sure. Please let me know what you find out. Thanks.

    Regards,

    James
  • Hi James,

    We checked the external load capacitor and it looks good, regarding the SW on both Rev A and B we are getting XT2OFFG =1 after setting the UCSCTL7 = 0x800D but Rev A is working and Rev B is not, anything else we need to set/check?

    Many Thanks

    HRi

  • Hi James,

    Ok when we changed the XT2OFF = 1 than we are not getting the XT2OFFG error, but than when the SELM=5 than the msp resets, when we are moving the SELM= 4 than everything is working the question is why, we are setting UCSCTL= 0x91CD, SELA = 5 and SELS = 5, in the documentation it is stating that "101b = XT2CLK when available, otherwise DCOCKDIV" what does it mean?

    Many Thanks,
    HRi
  • Hi HRi,

    I would like to close this thread temporarily by clicking "TI Thinks Resolved" since we are discussing the topic offline. If you have any new question or issue, please feel free to create thread on our forum.
  • Hi Wei,

    OK, Thank you !

    HRI

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