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MSP432E401Y: Silicon errata document

Richard Nole
Prodigy 135 points

Part Number: MSP432E401Y

Hi, my team and I are developing a commercial product and we're using the MSP432E401Y. But a few days ago, we found this errata document: http://www.ti.com/lit/er/slaz709/slaz709.pdf

I'd like to know if there's an update regarding those issues. That document is from 2017, I'd like to know if the microcontrollers that we buy now still have those issues.

Thank you

Richard

  • 0
    TI__Guru 73181 points
    Hello,
    There is not update at this time and the document you have linked to is the latest. If you would like to receive notifications of updates please click the 'Alert me' button at the top of the product page.

    Regards,
    Chris
  • 0 in reply to Chris Sterzik
    Prodigy 135 points

    Ok Chris, thank you. But just to confirm: If I  buy chips with code MSP432E401, according to that errata document, those chips shoudn't have those issues, right? Only chips with code XMS should have those issues. Is that correct? I ask this because we're planning to buy a lot of those chips for our commercial product.

    Thank you

    Richard

  • 0 in reply to Richard Nole
    TI__Guru 73181 points
    Richard,
    That is not correct. Both the XMS devices and the MSP (full production) devices share the same errata. The XMS and MSP deliniations are related to the quality of the silicon process. XMS is not fully qualified in order to provide customers with early development opportunities before the completely qualified silicon is available.

    The errata is referring to silicon design issues where the silicon did not meet the original design description. These issues are not fixed in qualification but require a redesign. This would be indicated in a die revision number.

    I hope that is more clear. Can you provide the errata text that you are referring to and I will ask that it be corrected?

    Regards,
    Chris
  • 0 in reply to Chris Sterzik
    Prodigy 135 points
    1. We have recently learned about the Silicon Errata (SLAZ709-October 2017) for the MSP432E4 microcontrollers. We use the MSP432E401YT and have produced a small first batch .

    Of all the erratas, we believe the most important for us are the GPIO#9 (PB0 and PB1 high current draw) and MEM#15 (Flash locations do not get erased). Is there a way to effectively and quickly diagnose this silicon errors? Maybe checking the NVIC registers?

    Which is the preferred workaround for these cases? In the case of MEM#15, how do we make sure to avoid this flash addresses?
  • 0 in reply to Richard Nole
    TI__Guru 73181 points
    Hello,
    The GPIO#9 is refering to an issue in the IO structure which will cause the inputs to latch and sink current. There will be no mechanism within the device to detect this. Is this for a USB application, CAN, or some other interface that requires PB0 and PB1? Ideally, these pins would not be used, but as an alternative you could place components to restrict signals from exceeding the transition time in the description (2ns 10-90%Vdd).

    The MEM#15 workaround is to simply write more than 2 words to a segment. I have asked my colleague to comment on this, but I do not believe the drivers handle this use case.

    Regards,
    Chris
  • 0 in reply to Chris Sterzik
    TI__Mastermind 22640 points
    Hello Richard,

    MEM#15 could occur when writing Persistent Data or values to Flash so that they can be used in the subsequent power cycles, like configuration data.

    This issue could occur in a very specific case, when writing only one or both of the first two words of the last line of sector in a bank.

    Work around is already mentioned in the Errata.

    You could also read the effected locations after an erase and check if they are erased.

    Thanks,
    Sai

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