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MSP430-GCC-OPENSOURCE: The latest 6.1.1.x (GCC 7.3.2.154) not working on MSP430F5438A.

Jongsoo Jeong
Prodigy 100 points
Part Number: MSP430-GCC-OPENSOURCE
Other Parts Discussed in Thread: MSP430F5419A

Hi,

I used msp-elf-gcc-5.0.0.0. I tried updating the toolchain to the latest 6.1.1.0 (GCC 7.3.2.154).

When I used the gcc with -O2 option, both compiling and linking works. But the code repeats halted and watchdog reset.

When I used the gcc with -O1 option, the linking is failed with messages below:

/Users/jsjeong/Work/nol.a-sdk-core/nola-sdk/make/../ti-msp430f5438a/libcoxos.a(digital-io.o): In function `digitalWriteInternal':
digital-io.cpp:(.either.text.digitalWriteInternal+0x9e): relocation truncated to fit: R_MSP430X_ABS16 against symbol `pinInfo' defined in .either.rodata.pinInf
o section in /Users/jsjeong/Work/nol.a-sdk-core/nola-sdk/make/../ti-msp430f5438a/libcoxos.a(Platform.o)
digital-io.cpp:(.either.text.digitalWriteInternal+0xc8): relocation truncated to fit: R_MSP430X_ABS16 against symbol `pinInfo' defined in .either.rodata.pinInf
o section in /Users/jsjeong/Work/nol.a-sdk-core/nola-sdk/make/../ti-msp430f5438a/libcoxos.a(Platform.o)
collect2: error: ld returned 1 exit status

I don't know why the pinInfo structure truncated. I'm using both -mcode-section=either and -mdata-section=either.

With adding __attribute__ ((section(far_rom))) to the pinInfo declaration, above error is resolved and the linking is success, but the code repeats halted and watchdog reset like the result of using -O2.

So, I tried downgrading to the 6.0.1.0 (GCC 7.3.1.24), then my code works.

Please, check it.

Thanks,

Jongsoo

  • 0
    Expert 2410 points

    Hi,

    Have you used the "-mlarge" flag (to enable the large memory model) when building both your application code and the library code you are linking against?

    Since the -mcode/data-region=either options enable code and data to be placed in upper memory (at or above address 0x10000), then the 16-bit relocation types (e.g. R_MSP430X_ABS16) generated by the assembler in the default small memory model will not reach upper memory. When -mlarge is passed then the assembler will use 20-bit relocations to relocate data, which can reach into upper memory.

    I suspect that you are seeing this error only with 7.3.2.154 because the program is slightly larger with this version compared to 7.3.1.24, so the upper memory needs to be utilised. With 7.3.1.24, -mdata-region=either doesn't have any effect as the entire program fits in lower memory and nothing needs to be placed above address 0x10000.

    If this is indeed your issue (-mcode/data-region=either used without -mlarge) then we are actually adding warnings to help the user diagnose this problem in the next version of the toolchain.

    Regards,

  • 0 in reply to Jozef_Lawrynowicz
    Prodigy 100 points

    Hi,

    Thank you for reply.

    I used '-mlarge' flag on my application code, my library code, and also linking.

    I found similar another case when I'm using GCC 7.3.1.24 for the MSP430F5419A based target board.
    The linking error message is almost same. But the errors are resolved when I removed only '-mdata-region=either'.

    I attached links of map files.

    without data-region=either

    with_data-region=either

    I have poor knowledge of relocation process of msp430-gcc. I just thought that the compiler and linker just split text and data into lower and higher ROM smartly. But due to cases I encountered, and existence of '-mcode/data-region' options, I think that MSP430 developers should know that which types of data should be placed at the lower and others or not, at least. Is there any technical documents about it? The SLAU646 is so rough to study deeper.

    Thank you.
    Jongsoo

  • 0 in reply to Jongsoo Jeong
    Expert 2410 points

    Jongsoo Jeong said:

    I used '-mlarge' flag on my application code, my library code, and also linking.

    Ok, thank you for clarifying this.

    In that case, it's possible the compiler is generating an MSP430 instruction instead of an MSP430X instruction when manipulating "pinInfo" in the "digitalWriteInternal()" function. That would then cause the assembler to use this 16-bit relocation which doesn't reach upper memory.

    Are you able to provide the source for the "digitalWriteInternal" function?

    I would like to check the relocations in the assembled file to see if there are any 16-bit ones that should be 20-bit. The assembly code produced by the compiler could then provide a clue as to what's going on.

    I have poor knowledge of relocation process of msp430-gcc. I just thought that the compiler and linker just split text and data into lower and higher ROM smartly. But due to cases I encountered, and existence of '-mcode/data-region' options, I think that MSP430 developers should know that which types of data should be placed at the lower and others or not, at least. Is there any technical documents about it? The SLAU646 is so rough to study deeper.

    When compiling with -mlarge, msp430-elf-gcc will always generate MSP430X instructions when manipulating global data. This means that the extended 20-bit relocations should also be generated by the assembler in all cases. This allows the linker to safely place data anywhere in upper/lower memory without having to be concerned about relocation overflows.

    In the next week or so a new version of the msp430-gcc will be released, and slau646 has also been updated to better describe how the mcode/data-region=either splitting functionality works.

    Regards,

  • 0 in reply to Jozef_Lawrynowicz
    Prodigy 100 points

    Thank you for your support.

    Are you able to provide the source for the "digitalWriteInternal" function?

    Sure. It's pretty simple.

    #define PxIN(p)    ((p)->baseRegister + 0x00)
#define PxOUT(p)   ((p)->baseRegister + 0x02)
#define PxDIR(p)   ((p)->baseRegister + 0x04)
#define PxREN(p)   ((p)->baseRegister + 0x06)
#define PxDS(p)    ((p)->baseRegister + 0x08)
#define PxSEL(p)   ((p)->baseRegister + 0x0A)
#define PxIES(p)   ((p)->baseRegister + 0x18)
#define PxIE(p)    ((p)->baseRegister + 0x1A)
#define PxIFG(p)   ((p)->baseRegister + 0x1C)

bool digitalWriteInternal(int8_t pin, int value) {
  if (pin < 0) {
    return false;
  }

  volatile uint8_t *sel = PxSEL(&pinInfo[pin]);
  volatile uint8_t *out = PxOUT(&pinInfo[pin]);

  bitClear(*sel, pinInfo[pin].pin);
  bitWrite(*out, pinInfo[pin].pin, value);
  return true;
}

    The 'pinInfo' is a const array of a struct defined as below:

    struct msp430_io {
  uint8_t pin;
  uint8_t *baseRegister;
  int8_t portCallbackIndex;
  int8_t adcChannel;
  int8_t analogWriteChannel;
  MSP430AnalotWrite_t analogWriteType;
};

    I would like to check the relocations in the assembled file to see if there are any 16-bit ones that should be 20-bit. The assembly code produced by the compiler could then provide a clue as to what's going on.

    OK. This is an assembled of the function. Below is from the list file generated by the compiler with '-g' option.

     411               	.LFE244:
 412               		.size	pinModeInternal, .-pinModeInternal
 413               		.section	.either.text.digitalWriteInternal,"ax",@progbits
 414               		.balign 2
 415               		.global	digitalWriteInternal
 416               		.type	digitalWriteInternal, @function
 417               	digitalWriteInternal:
 418               	.LFB245:
  92:/Users/jsjeong/Work/nol.a-sdk-core/src/arch/msp430x5xx/digital-io.cpp ****   if (pin < 0) {
 419               		.loc 1 92 0
 420               	; start of function
 421               	; framesize_regs:     24
 422               	; framesize_locals:   4
 423               	; framesize_outgoing: 0
 424               	; framesize:          28
 425               	; elim ap -> fp       28
 426               	; elim fp -> sp       4
 427               	; saved regs: R4 R6 R7 R8 R9 R10
 428               	.LVL29:
 429               		; start of prologue
 430 0000 4A14      		PUSHM.A	#5, R10
 431               	.LCFI4:
 432 0002 0414      		PUSHM.A	#1, R4
 433               	.LCFI5:
 434 0004 B100 0400 		SUBA	#4, R1
 435               	.LCFI6:
 436               		; end of prologue
 437 0008 4018 8C11 		SXTX	R12
 438 000c 094D      		MOV.W	R13, R9
  93:/Users/jsjeong/Work/nol.a-sdk-core/src/arch/msp430x5xx/digital-io.cpp ****     return false;
 439               		.loc 1 93 0
 440 000e 4C93 0038 		CMP.B	#0, R12 { JL	.L19
  97:/Users/jsjeong/Work/nol.a-sdk-core/src/arch/msp430x5xx/digital-io.cpp ****   volatile uint8_t *out = PxOUT(&pinInfo[pin]);
 441               		.loc 1 97 0
 442 0012 0A4C      		MOV.W	R12, R10
 443 0014 8400 0000 		MOVA	#pinInfo, R4
 444 0018 074C      		MOV.W	R12, R7
 445 001a 470E 470D 		RLAM.A #4, R7 { RRAM.A #4, R7
 446 001e CC07      		MOVA	R7, R12
 447               	.LVL30:
 448 0020 EC07      		ADDA	R7, R12
 449 0022 C60C      		MOVA	R12, R6
 450 0024 E607      		ADDA	R7, R6
 451 0026 0746 0018 		MOV.W	R6, R7 { MOVX.A	R6, R8 { RPT	#16 { RRAX.A	R8 ; sign extend pointer in R6 into R7:R8
 451      4846 0F18 
 451      4811 
 452 0030 0757 0868 		RLA.W	R7 { RLC.W	R8 { RLA.W	R7 { RLC.W	R8
 452      0757 0868 
 453 0038 8147 0000 		MOV.W	R7, @R1
 454 003c 8148 0200 		MOV.W	R8, 2(R1)
 455 0040 0801      		MOVA	@R1, R8
 456 0042 E804      		ADDA	R4, R8
 457 0044 3808 0200 		MOVA	2(R8), R8
 458               	.LVL31:
 100:/Users/jsjeong/Work/nol.a-sdk-core/src/arch/msp430x5xx/digital-io.cpp ****   bitWrite(*out, pinInfo[pin].pin, value);
 459               		.loc 1 100 0
 460 0048 5748 0A00 		MOV.B	10(R8), R7
 461 004c 0018 6451 		ADDX.A	@R1, R4
 462 0050 6E44      		MOV.B	@R4, R14
 463 0052 5C43      		MOV.B	#1, R12
 464 0054 4D43      		MOV.B	#0, R13
 465               	.LVL32:
 466 0056 0F43      		MOV.W	#0,R15
 467 0058 B013 0000 		CALLA	#__mspabi_slll
 468               	.LVL33:
 469 005c 47CC      		BIC.B	R12, R7
 470 005e C847 0A00 		MOV.B	R7, 10(R8)
 101:/Users/jsjeong/Work/nol.a-sdk-core/src/arch/msp430x5xx/digital-io.cpp ****   return true;
 471               		.loc 1 101 0
 472 0062 0993 0020 		CMP.W	#0, R9 { JNE	.L20
 101:/Users/jsjeong/Work/nol.a-sdk-core/src/arch/msp430x5xx/digital-io.cpp ****   return true;
 473               		.loc 1 101 0 is_stmt 0 discriminator 2
 474 0066 5948 0200 		MOV.B	2(R8), R9
 475               	.LVL34:
 476 006a 4A0E 4A0D 		RLAM.A #4, R10 { RRAM.A #4, R10
 477               	.LVL35:
 478 006e CC0A      		MOVA	R10, R12
 479 0070 EC0A      		ADDA	R10, R12
 480 0072 EA0C      		ADDA	R12, R10
 481 0074 0018 4B4A 		MOVX.A	R10, R11 { MOV.W	R10, R10 { RPT	#16 { RRAX.A	R11 ; sign extend pointer in R10 into R10:R11
 481      0A4A 0F18 
 481      4B11 
 482 007e 0E4A      		MOV.W	R10, R14
 483 0080 0F4B      		MOV.W	R11, R15
 484 0082 0E5E 0F6F 		RLA.W	R14 { RLC.W	R15 { RLA.W	R14 { RLC.W	R15
 484      0E5E 0F6F 
 485 008a 814E 0000 		MOV.W	R14, @R1
 486 008e 814F 0200 		MOV.W	R15, 2(R1)
 487 0092 0F01      		MOVA	@R1, R15
 488 0094 4018 5E4F 		MOVX.B	pinInfo(R15), R14
 488      0000 
 489 009a 5C43      		MOV.B	#1, R12
 490 009c 4D43      		MOV.B	#0, R13
 491 009e 0F43      		MOV.W	#0,R15
 492 00a0 B013 0000 		CALLA	#__mspabi_slll
 493               	.LVL36:
 494 00a4 49CC      		BIC.B	R12, R9
 495 00a6 C849 0200 		MOV.B	R9, 2(R8)
 102:/Users/jsjeong/Work/nol.a-sdk-core/src/arch/msp430x5xx/digital-io.cpp **** }
 496               		.loc 1 102 0 is_stmt 1 discriminator 2
 497 00aa 5C43      		MOV.B	#1, R12
 498               	.LVL37:
 499               	.L17:
 103:/Users/jsjeong/Work/nol.a-sdk-core/src/arch/msp430x5xx/digital-io.cpp **** 
 500               		.loc 1 103 0
 501               		; start of epilogue
 502 00ac A100 0400 		ADDA	#4, R1
 503 00b0 0416      		POPM.A	#1, r4
 504 00b2 4616      		POPM.A	#5, r10
 505 00b4 1001      		RETA
 506               	.LVL38:
 507               	.L20:
 101:/Users/jsjeong/Work/nol.a-sdk-core/src/arch/msp430x5xx/digital-io.cpp ****   return true;
 508               		.loc 1 101 0 discriminator 1
 509 00b6 5948 0200 		MOV.B	2(R8), R9
 510               	.LVL39:
 511 00ba 0A46 0018 		MOV.W	R6, R10 { MOVX.A	R6, R11 { RPT	#16 { RRAX.A	R11 ; sign extend pointer in R6 into R10:R11
 511      4B46 0F18 
 511      4B11 
 512 00c4 0D01      		MOVA	@R1, R13
 513 00c6 4018 5E4D 		MOVX.B	pinInfo(R13), R14
 513      0000 
 514 00cc 5C43      		MOV.B	#1, R12
 515 00ce 4D43      		MOV.B	#0, R13
 516 00d0 0F43      		MOV.W	#0,R15
 517 00d2 B013 0000 		CALLA	#__mspabi_slll
 518               	.LVL40:
 519 00d6 4CD9      		BIS.B	R9, R12
 520 00d8 C84C 0200 		MOV.B	R12, 2(R8)
 102:/Users/jsjeong/Work/nol.a-sdk-core/src/arch/msp430x5xx/digital-io.cpp **** }
 521               		.loc 1 102 0 discriminator 1
 522 00dc 5C43      		MOV.B	#1, R12
 523 00de 8000 0000 		BRA	#.L17
 524               	.LVL41:
 525               	.L19:
  94:/Users/jsjeong/Work/nol.a-sdk-core/src/arch/msp430x5xx/digital-io.cpp ****   }
 526               		.loc 1 94 0
 527 00e2 4C43      		MOV.B	#0, R12
 528 00e4 8000 0000 		BRA	#.L17

    I wish these are helpful to clarify what the problem is.

    Thank you.
    Jongsoo

  • 0 in reply to Jongsoo Jeong
    Expert 2410 points

    Hi,

    Thank you for the further information. Unfortunately it's not enough for me to reproduce the problem.

    It looks like bitClear() and bitWrite() get inlined into digitalWriteInternal() so the function when compiled in your code is more complicated than what I've been able to reproduce.

    So for me to be able to accurately reproduce "digital-io.o" I also need the following:
    - the source for bitClear and bitWrite
    - the typedef for "MSP430AnalotWrite_t"
    - the full command line invocation of msp430-elf-gcc used to build "digital-io.o"

    I also have some other questions based on what you've posted so far.

    In your original post, the error message listed the overflowing relocations of pinInfo at offsets 0x9E and 0xC8 in the digitalWriteInternal function. I noticed in the disassembly of the function that you posted, the offsets of the relocations of pinInfo are slightly different - at offsets 0x98 and 0xCA.
    Can you please post the exact error message regarding the relocation overflows you get for this assembled code.
    In your disassembly at digitalWriteInternal+0x94/0xC6, "MOVX" has been used to manipulate pinInfo, which the assembler should be using a 20-bit relocation type for. When I assemble "MOVX.B pinInfo(R15), R14", the R_MSP430X_ABS20_EXT_SRC relocation is used to relocate pinInfo. Meanwhile, you get the R_MSP430X_ABS16 relocation.

    It would also be useful to look at the ELF data in the object file containing the overflowing relocation.

    Could you also post the output of  "msp430-elf-readelf -aW digital-io.o" or "msp430-elf-readelf -aW libcoxos.a".

    Hopefully once we can diagnose the relocation overflow you see at -O1 it will be easier to understand why you might be getting halting/watchdog resetting code at -O2.

    Thanks and regards,

  • 0 in reply to Jozef_Lawrynowicz
    Prodigy 100 points

    Hi,

    the source for bitClear and bitWrite

    They macros defined as below

    #define bitClear(v, n)       ((v) &= ~bit(n))
#define bitWrite(v, n, b)    ((b) ? bitSet(v, n) : bitClear(v, n))

    the typedef for "MSP430AnalotWrite_t"

    typedef enum {
  MSP430_AW_NA,
  MSP430_AW_PWM,
  MSP430_AW_DAC,
} MSP430AnalotWrite_t;

    the full command line invocation of msp430-elf-gcc used to build "digital-io.o"

    msp430-elf-g++ -std=gnu++14 -fno-exceptions -fno-rtti -fno-threadsafe-statics -c -mmcu=msp430f5419a -mhwmult=f5series -mlarge -mcode-region=either -mdata-region=either -O1 -fdata-sections -ffunction-sections -Wall -Wa,-ahlms=digital-io.cpp.lst -D__MSP430F5419A__ -D{...} -I{...} digital-io.cpp -o digital-io.o

    In the above command, I abbreviate all -D and -I flags as '-D{...}' and '-I{...}'.

    Can you please post the exact error message regarding the relocation overflows you get for this assembled code.

    Sorry making you confused. Since I and my colleagues are fixing source codes, there are some mismatched results. Here is the exact output error message.

    /home/jsjeong/work/nol.a-sdk-core/nola-sdk/make/../plm100/libcoxos.a(digital-io.o): In function `digitalWriteInternal':
digital-io.cpp:(.either.text.digitalWriteInternal+0x9e): relocation truncated to fit: R_MSP430X_ABS16 against symbol `pinInfo' defined in .either.rodata.pinInfo section in /home/jsjeong/work/nol.a-sdk-core/nola-sdk/make/../plm100/Platform.o
digital-io.cpp:(.either.text.digitalWriteInternal+0xc8): relocation truncated to fit: R_MSP430X_ABS16 against symbol `pinInfo' defined in .either.rodata.pinInfo section in /home/jsjeong/work/nol.a-sdk-core/nola-sdk/make/../plm100/Platform.o

    Could you also post the output of  "msp430-elf-readelf -aW digital-io.o" or "msp430-elf-readelf -aW libcoxos.a".

    Here is the output of "msp430-elf-readelf -aW digital-io.o":

    ELF Header:
  Magic:   7f 45 4c 46 01 01 01 ff 00 00 00 00 00 00 00 00 
  Class:                             ELF32
  Data:                              2's complement, little endian
  Version:                           1 (current)
  OS/ABI:                            Standalone App
  ABI Version:                       0
  Type:                              REL (Relocatable file)
  Machine:                           Texas Instruments msp430 microcontroller
  Version:                           0x1
  Entry point address:               0x0
  Start of program headers:          0 (bytes into file)
  Start of section headers:          6412 (bytes into file)
  Flags:                             0x2d: architecture variant: MSP430X
  Size of this header:               52 (bytes)
  Size of program headers:           0 (bytes)
  Number of program headers:         0
  Size of section headers:           40 (bytes)
  Number of section headers:         25
  Section header string table index: 22

Section Headers:
  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
  [ 1] .text             PROGBITS        00000000 000034 000000 00  AX  0   0  1
  [ 2] .data             PROGBITS        00000000 000034 000000 00  WA  0   0  1
  [ 3] .bss              NOBITS          00000000 000034 000000 00  WA  0   0  1
  [ 4] .either.text._ZL14setupInterrupthi PROGBITS        00000000 000034 000128 00  AX  0   0  2
  [ 5] .rela.either.text._ZL14setupInterrupthi RELA            00000000 001148 000090 0c   I 23   4  4
  [ 6] .either.text.pinModeInternal PROGBITS        00000000 00015c 0002c2 00  AX  0   0  2
  [ 7] .rela.either.text.pinModeInternal RELA            00000000 0011d8 000150 0c   I 23   6  4
  [ 8] .either.text.digitalWriteInternal PROGBITS        00000000 00041e 0000e6 00  AX  0   0  2
  [ 9] .rela.either.text.digitalWriteInternal RELA            00000000 001328 000078 0c   I 23   8  4
  [10] .either.text.digitalToggleInternal PROGBITS        00000000 000504 0000a0 00  AX  0   0  2
  [11] .rela.either.text.digitalToggleInternal RELA            00000000 0013a0 00003c 0c   I 23  10  4
  [12] .either.text.digitalReadInternal PROGBITS        00000000 0005a4 000060 00  AX  0   0  2
  [13] .rela.either.text.digitalReadInternal RELA            00000000 0013dc 000030 0c   I 23  12  4
  [14] .either.text._Z23attachInterruptInternalaPFvvEib PROGBITS        00000000 000604 000172 00  AX  0   0  2
  [15] .rela.either.text._Z23attachInterruptInternalaPFvvEib RELA            00000000 00140c 0000fc 0c   I 23  14  4
  [16] .either.text._Z23attachInterruptInternalaPFvPvES_ib PROGBITS        00000000 000776 000192 00  AX  0   0  2
  [17] .rela.either.text._Z23attachInterruptInternalaPFvPvES_ib RELA            00000000 001508 000114 0c   I 23  16  4
  [18] .either.text._Z23attachInterruptInternalaPFvR19gpio_interrupt_infoEPvib PROGBITS        00000000 000908 0001ac 00  AX  0   0  2
  [19] .rela.either.text._Z23attachInterruptInternalaPFvR19gpio_interrupt_infoEPvib RELA            00000000 00161c 00012c 0c   I 23  18  4
  [20] .comment          PROGBITS        00000000 000ab4 00003b 01  MS  0   0  1
  [21] .MSP430.attributes MSP430_ATTRIBUTES 00000000 000aef 000017 00      0   0  1
  [22] .shstrtab         STRTAB          00000000 001748 0001c3 00      0   0  1
  [23] .symtab           SYMTAB          00000000 000b08 000420 10     24  51  4
  [24] .strtab           STRTAB          00000000 000f28 00021e 00      0   0  1
Key to Flags:
  W (write), A (alloc), X (execute), M (merge), S (strings)
  I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown)
  O (extra OS processing required) o (OS specific), p (processor specific)

There are no section groups in this file.

There are no program headers in this file.

Relocation section '.rela.either.text._ZL14setupInterrupthi' at offset 0x1148 contains 12 entries:
 Offset     Info    Type                Sym. Value  Symbol's Name + Addend
0000000a  0000350b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
00000050  0000360c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slli + 0
00000068  0000360c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slli + 0
00000076  00000e13 R_MSP430X_10_PCREL     000000c4   .L5 + 0
0000007c  00000f13 R_MSP430X_10_PCREL     00000120   .L1 + 0
000000b0  00003508 R_MSP430X_ABS20_EXT_SR 00000000   pinInfo + 0
000000b6  0000360c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slli + 0
000000c0  0000100b R_MSP430X_ABS20_ADR_SR 000000dc   .L3 + 0
000000cc  00003508 R_MSP430X_ABS20_EXT_SR 00000000   pinInfo + 0
000000d2  0000360c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slli + 0
00000110  00003508 R_MSP430X_ABS20_EXT_SR 00000000   pinInfo + 0
00000116  0000360c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slli + 0

Relocation section '.rela.either.text.pinModeInternal' at offset 0x11d8 contains 28 entries:
 Offset     Info    Type                Sym. Value  Symbol's Name + Addend
0000000e  00001113 R_MSP430X_10_PCREL     000002b2   .L13 + 0
00000012  0000350b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
00000060  0000380c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
0000006c  00001213 R_MSP430X_10_PCREL     0000019c   .L8 + 0
00000072  00001313 R_MSP430X_10_PCREL     0000011c   .L15 + 0
00000076  00001413 R_MSP430X_10_PCREL     00000218   .L11 + 0
0000007c  00001513 R_MSP430X_10_PCREL     00000082   .L1^B1 + 0
0000007e  0000160b R_MSP430X_ABS20_ADR_SR 000002bc   .L14 + 0
00000086  0000350b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
000000c4  0000380c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
000000e2  0000380c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
0000010c  0000380c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
00000118  0000170b R_MSP430X_ABS20_ADR_SR 000002b4   .L7 + 0
0000011e  00001613 R_MSP430X_10_PCREL     000002bc   .L14 + 0
00000124  0000350b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
00000162  0000380c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
0000018c  0000380c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
00000198  0000170b R_MSP430X_ABS20_ADR_SR 000002b4   .L7 + 0
000001a0  0000350b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
000001de  0000380c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
00000208  0000380c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
00000214  0000170b R_MSP430X_ABS20_ADR_SR 000002b4   .L7 + 0
0000021c  0000350b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
0000025a  0000380c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
00000278  0000380c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
000002a2  0000380c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
000002ae  0000170b R_MSP430X_ABS20_ADR_SR 000002b4   .L7 + 0
000002be  0000170b R_MSP430X_ABS20_ADR_SR 000002b4   .L7 + 0

Relocation section '.rela.either.text.digitalWriteInternal' at offset 0x1328 contains 10 entries:
 Offset     Info    Type                Sym. Value  Symbol's Name + Addend
00000010  00001813 R_MSP430X_10_PCREL     000000e0   .L19 + 0
00000014  0000350b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
0000005c  0000380c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
00000068  00001913 R_MSP430X_10_PCREL     000000bc   .L20 + 0
0000009e  0000350f R_MSP430X_ABS16        00000000   pinInfo + 0
000000a6  0000380c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
000000c8  0000350f R_MSP430X_ABS16        00000000   pinInfo + 0
000000d0  0000380c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
000000dc  00001a0b R_MSP430X_ABS20_ADR_SR 000000b2   .L17 + 0
000000e2  00001a0b R_MSP430X_ABS20_ADR_SR 000000b2   .L17 + 0

Relocation section '.rela.either.text.digitalToggleInternal' at offset 0x13a0 contains 5 entries:
 Offset     Info    Type                Sym. Value  Symbol's Name + Addend
00000010  00001b13 R_MSP430X_10_PCREL     0000009a   .L23 + 0
00000012  0000350b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
00000060  0000380c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
00000082  0000360c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slli + 0
0000009c  00001c0b R_MSP430X_ABS20_ADR_SR 0000008e   .L22 + 0

Relocation section '.rela.either.text.digitalReadInternal' at offset 0x13dc contains 4 entries:
 Offset     Info    Type                Sym. Value  Symbol's Name + Addend
0000000c  00001d13 R_MSP430X_10_PCREL     0000005a   .L26 + 0
0000000e  0000350b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
0000004c  00003c0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_srai + 0
0000005c  00001e0b R_MSP430X_ABS20_ADR_SR 00000052   .L24 + 0

Relocation section '.rela.either.text._Z23attachInterruptInternalaPFvvEib' at offset 0x140c contains 21 entries:
 Offset     Info    Type                Sym. Value  Symbol's Name + Addend
00000014  00001f13 R_MSP430X_10_PCREL     0000015a   .L30 + 0
00000044  0000350b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
00000052  00002013 R_MSP430X_10_PCREL     00000162   .L31 + 0
0000005e  00002113 R_MSP430X_10_PCREL     0000016a   .L32 + 0
00000076  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
00000080  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 3
00000092  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
0000009c  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 4
000000a8  00002213 R_MSP430X_10_PCREL     00000154   .L33 + 0
000000ac  0000060c R_MSP430X_ABS20_ADR_DS 00000000   _ZL14setupInterrupthi + 0
000000de  0000350b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
00000100  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
0000010a  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 0
0000011e  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
00000128  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 1
0000013a  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
00000144  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 4
00000156  0000230b R_MSP430X_ABS20_ADR_SR 000000aa   .L29 + 0
0000015e  0000240b R_MSP430X_ABS20_ADR_SR 0000014c   .L27 + 0
00000166  0000240b R_MSP430X_ABS20_ADR_SR 0000014c   .L27 + 0
0000016e  0000240b R_MSP430X_ABS20_ADR_SR 0000014c   .L27 + 0

Relocation section '.rela.either.text._Z23attachInterruptInternalaPFvPvES_ib' at offset 0x1508 contains 23 entries:
 Offset     Info    Type                Sym. Value  Symbol's Name + Addend
00000014  00002513 R_MSP430X_10_PCREL     0000017a   .L37 + 0
00000044  0000350b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
00000052  00002613 R_MSP430X_10_PCREL     00000182   .L38 + 0
0000005e  00002713 R_MSP430X_10_PCREL     0000018a   .L39 + 0
00000076  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
00000080  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 3
00000092  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
0000009c  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 4
000000a8  00002813 R_MSP430X_10_PCREL     00000174   .L40 + 0
000000ac  0000060c R_MSP430X_ABS20_ADR_DS 00000000   _ZL14setupInterrupthi + 0
000000de  0000350b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
00000100  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
0000010a  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 0
0000011e  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
00000128  00003f0a R_MSP430X_ABS20_EXT_OD 00000000   portCallback + 1
0000013e  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
00000148  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 4
0000015a  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
00000164  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 8
00000176  0000290b R_MSP430X_ABS20_ADR_SR 000000aa   .L36 + 0
0000017e  00002a0b R_MSP430X_ABS20_ADR_SR 0000016c   .L34 + 0
00000186  00002a0b R_MSP430X_ABS20_ADR_SR 0000016c   .L34 + 0
0000018e  00002a0b R_MSP430X_ABS20_ADR_SR 0000016c   .L34 + 0

Relocation section '.rela.either.text._Z23attachInterruptInternalaPFvR19gpio_interrupt_infoEPvib' at offset 0x161c contains 25 entries:
 Offset     Info    Type                Sym. Value  Symbol's Name + Addend
00000014  00002b13 R_MSP430X_10_PCREL     00000194   .L44 + 0
00000044  0000350b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
00000052  00002c13 R_MSP430X_10_PCREL     0000019c   .L45 + 0
0000005e  00002d13 R_MSP430X_10_PCREL     000001a4   .L46 + 0
00000076  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
00000080  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 3
00000092  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
0000009c  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 4
000000a8  00002e13 R_MSP430X_10_PCREL     0000018e   .L47 + 0
000000ac  0000060c R_MSP430X_ABS20_ADR_DS 00000000   _ZL14setupInterrupthi + 0
000000da  0000350b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
000000fc  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
00000106  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 0
0000011a  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
00000124  00003f0a R_MSP430X_ABS20_EXT_OD 00000000   portCallback + 1
0000013a  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
00000144  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 4
00000158  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
00000162  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 8
00000174  00003e0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll_3 + 0
0000017e  00003f09 R_MSP430X_ABS20_EXT_DS 00000000   portCallback + 2
00000190  00002f0b R_MSP430X_ABS20_ADR_SR 000000aa   .L43 + 0
00000198  0000300b R_MSP430X_ABS20_ADR_SR 00000186   .L41 + 0
000001a0  0000300b R_MSP430X_ABS20_ADR_SR 00000186   .L41 + 0
000001a8  0000300b R_MSP430X_ABS20_ADR_SR 00000186   .L41 + 0

The decoding of unwind sections for machine type Texas Instruments msp430 microcontroller is not currently supported.

Symbol table '.symtab' contains 66 entries:
   Num:    Value  Size Type    Bind   Vis      Ndx Name
     0: 00000000     0 NOTYPE  LOCAL  DEFAULT  UND 
     1: 00000000     0 FILE    LOCAL  DEFAULT  ABS digital-io.cpp
     2: 00000000     0 SECTION LOCAL  DEFAULT    1 
     3: 00000000     0 SECTION LOCAL  DEFAULT    2 
     4: 00000000     0 SECTION LOCAL  DEFAULT    3 
     5: 00000000     0 SECTION LOCAL  DEFAULT    4 
     6: 00000000   296 FUNC    LOCAL  DEFAULT    4 _ZL14setupInterrupthi
     7: 00000000     0 SECTION LOCAL  DEFAULT    6 
     8: 00000000     0 SECTION LOCAL  DEFAULT    8 
     9: 00000000     0 SECTION LOCAL  DEFAULT   10 
    10: 00000000     0 SECTION LOCAL  DEFAULT   12 
    11: 00000000     0 SECTION LOCAL  DEFAULT   14 
    12: 00000000     0 SECTION LOCAL  DEFAULT   16 
    13: 00000000     0 SECTION LOCAL  DEFAULT   18 
    14: 000000c4     0 NOTYPE  LOCAL  DEFAULT    4 .L5
    15: 00000120     0 NOTYPE  LOCAL  DEFAULT    4 .L1
    16: 000000dc     0 NOTYPE  LOCAL  DEFAULT    4 .L3
    17: 000002b2     0 NOTYPE  LOCAL  DEFAULT    6 .L13
    18: 0000019c     0 NOTYPE  LOCAL  DEFAULT    6 .L8
    19: 0000011c     0 NOTYPE  LOCAL  DEFAULT    6 .L15
    20: 00000218     0 NOTYPE  LOCAL  DEFAULT    6 .L11
    21: 00000082     0 NOTYPE  LOCAL  DEFAULT    6 .L1^B1
    22: 000002bc     0 NOTYPE  LOCAL  DEFAULT    6 .L14
    23: 000002b4     0 NOTYPE  LOCAL  DEFAULT    6 .L7
    24: 000000e0     0 NOTYPE  LOCAL  DEFAULT    8 .L19
    25: 000000bc     0 NOTYPE  LOCAL  DEFAULT    8 .L20
    26: 000000b2     0 NOTYPE  LOCAL  DEFAULT    8 .L17
    27: 0000009a     0 NOTYPE  LOCAL  DEFAULT   10 .L23
    28: 0000008e     0 NOTYPE  LOCAL  DEFAULT   10 .L22
    29: 0000005a     0 NOTYPE  LOCAL  DEFAULT   12 .L26
    30: 00000052     0 NOTYPE  LOCAL  DEFAULT   12 .L24
    31: 0000015a     0 NOTYPE  LOCAL  DEFAULT   14 .L30
    32: 00000162     0 NOTYPE  LOCAL  DEFAULT   14 .L31
    33: 0000016a     0 NOTYPE  LOCAL  DEFAULT   14 .L32
    34: 00000154     0 NOTYPE  LOCAL  DEFAULT   14 .L33
    35: 000000aa     0 NOTYPE  LOCAL  DEFAULT   14 .L29
    36: 0000014c     0 NOTYPE  LOCAL  DEFAULT   14 .L27
    37: 0000017a     0 NOTYPE  LOCAL  DEFAULT   16 .L37
    38: 00000182     0 NOTYPE  LOCAL  DEFAULT   16 .L38
    39: 0000018a     0 NOTYPE  LOCAL  DEFAULT   16 .L39
    40: 00000174     0 NOTYPE  LOCAL  DEFAULT   16 .L40
    41: 000000aa     0 NOTYPE  LOCAL  DEFAULT   16 .L36
    42: 0000016c     0 NOTYPE  LOCAL  DEFAULT   16 .L34
    43: 00000194     0 NOTYPE  LOCAL  DEFAULT   18 .L44
    44: 0000019c     0 NOTYPE  LOCAL  DEFAULT   18 .L45
    45: 000001a4     0 NOTYPE  LOCAL  DEFAULT   18 .L46
    46: 0000018e     0 NOTYPE  LOCAL  DEFAULT   18 .L47
    47: 000000aa     0 NOTYPE  LOCAL  DEFAULT   18 .L43
    48: 00000186     0 NOTYPE  LOCAL  DEFAULT   18 .L41
    49: 00000000     0 SECTION LOCAL  DEFAULT   20 
    50: 00000000     0 SECTION LOCAL  DEFAULT   21 
    51: 00000000     0 NOTYPE  GLOBAL DEFAULT  UND __crt0_move_highdata
    52: 00000000     0 NOTYPE  GLOBAL DEFAULT  UND __crt0_init_highbss
    53: 00000000     0 NOTYPE  GLOBAL DEFAULT  UND pinInfo
    54: 00000000     0 NOTYPE  GLOBAL DEFAULT  UND __mspabi_slli
    55: 00000000   706 FUNC    GLOBAL DEFAULT    6 pinModeInternal
    56: 00000000     0 NOTYPE  GLOBAL DEFAULT  UND __mspabi_slll
    57: 00000000   230 FUNC    GLOBAL DEFAULT    8 digitalWriteInternal
    58: 00000000   160 FUNC    GLOBAL DEFAULT   10 digitalToggleInternal
    59: 00000000    96 FUNC    GLOBAL DEFAULT   12 digitalReadInternal
    60: 00000000     0 NOTYPE  GLOBAL DEFAULT  UND __mspabi_srai
    61: 00000000   370 FUNC    GLOBAL DEFAULT   14 _Z23attachInterruptInternalaPFvvEib
    62: 00000000     0 NOTYPE  GLOBAL DEFAULT  UND __mspabi_slll_3
    63: 00000000     0 NOTYPE  GLOBAL DEFAULT  UND portCallback
    64: 00000000   402 FUNC    GLOBAL DEFAULT   16 _Z23attachInterruptInternalaPFvPvES_ib
    65: 00000000   428 FUNC    GLOBAL DEFAULT   18 _Z23attachInterruptInternalaPFvR19gpio_interrupt_infoEPvib

No version information found in this file.
Attribute Section: mspabi
File Attributes
  Tag_ISA: MSP430X
  Tag_Code_Model: Large
  Tag_Data_Model: Large

    And here is the download link of the output of "msp430-elf-readelf -aW libcoxos.a".

    https://www.dropbox.com/s/tzcypi4y58zumkf/libcoxos.a-readelf.txt?dl=0

    I hope these are helpful for you to diagnose.

    Thank you.
    Jongsoo

  • 0 in reply to Jongsoo Jeong
    Expert 2410 points

    Hi,

    Thank you for providing the further information.

    It certainly seems like there is a problem with the compiler/assembler since I can see the R_MSP430X_ABS16 relocations for pinInfo among all the other 20-bit relocations, which looks wrong.

    However, even with the further source code and GCC invocation you provided, I cannot reproduce it. I had to infer definitions of "bit(n)" and "bitSet(v, n)", however these are straightforward and I wouldn't think these would be the cause of the discrepancy.

    Could you please have a look at the below invocation and source code, and see if you can fill in the gaps so that the problem reproduces.

    /home/jozef/msp430-gcc-7.3.2.154_linux64/bin/msp430-elf-g++ -std=gnu++14 -fno-exceptions -fno-rtti -fno-threadsafe-statics -fdata-sections -ffunction-sections -Wall -Wa,-ahlms=digital-io.cpp.lst -D__MSP430F5419A__  -c -mmcu=msp430f5419a
-mhwmult=f5series -mlarge -mcode-region=either -mdata-region=either -O1 digital-io.cpp -o digital-io.o

    #include <stdint.h>
#include <stdbool.h>

#define PxIN(p)    ((p)->baseRegister + 0x00)
#define PxOUT(p)   ((p)->baseRegister + 0x02)
#define PxDIR(p)   ((p)->baseRegister + 0x04)
#define PxREN(p)   ((p)->baseRegister + 0x06)
#define PxDS(p)    ((p)->baseRegister + 0x08)
#define PxSEL(p)   ((p)->baseRegister + 0x0A)
#define PxIES(p)   ((p)->baseRegister + 0x18)
#define PxIE(p)    ((p)->baseRegister + 0x1A)
#define PxIFG(p)   ((p)->baseRegister + 0x1C)

#define bit(n)               ((1 << n))
#define bitSet(v, n)         ((v) |= bit(n))
#define bitClear(v, n)       ((v) &= ~bit(n))
#define bitWrite(v, n, b)    ((b) ? bitSet(v, n) : bitClear(v, n))

typedef enum {
  MSP430_AW_NA,
  MSP430_AW_PWM,
  MSP430_AW_DAC,
} MSP430AnalotWrite_t;

struct msp430_io {
  uint8_t pin;
  uint8_t *baseRegister;
  int8_t portCallbackIndex;
  int8_t adcChannel;
  int8_t analogWriteChannel;
  MSP430AnalotWrite_t analogWriteType;
};

volatile extern const struct msp430_io pinInfo[10];

bool digitalWriteInternal(int8_t pin, int value) {
  if (pin < 0) {
    return false;
  }

  volatile uint8_t *sel = PxSEL(&pinInfo[pin]);
  volatile uint8_t *out = PxOUT(&pinInfo[pin]);

  bitClear(*sel, pinInfo[pin].pin);
  bitWrite(*out, pinInfo[pin].pin, value);
  return true;
}
    /home/jozef/msp430-gcc-7.3.2.154_linux64/bin/msp430-elf-readelf -rW digital-io.o

Relocation section '.rela.either.text._Z20digitalWriteInternalai' at offset 0x318 contains 10 entries:
 Offset     Info    Type                Sym. Value  Symbol's Name + Addend
0000000e  00000613 R_MSP430X_10_PCREL     00000114   .L4 + 0
00000012  00000e0b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
00000078  00000f0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slli + 0
00000084  00000713 R_MSP430X_10_PCREL     000000d4   .L5 + 0
000000b4  00000e08 R_MSP430X_ABS20_EXT_SR 00000000   pinInfo + 0   // To reproduce the problem there must be R_MSP430X_ABS16 here
000000c0  00000f0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slli + 0
000000f8  00000e08 R_MSP430X_ABS20_EXT_SR 00000000   pinInfo + 0   // To reproduce the problem there must be R_MSP430X_ABS16 here
00000104  00000f0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slli + 0
00000110  0000080b R_MSP430X_ABS20_ADR_SR 000000cc   .L2 + 0
00000116  0000080b R_MSP430X_ABS20_ADR_SR 000000cc   .L2 + 0

    So as the above comments say, I need to be able to reproduce the R_MSP430X_ABS16 relocations for pinInfo in digital-io.o to track down the cause of the issue.

    Thanks again for providing the detailed information,

  • 0 in reply to Jozef_Lawrynowicz
    Prodigy 100 points

    Hi,

    Thank you for your support.

    From your code, I fixed some points to equals to mine like below:

    #include <stdint.h>
#include <stdbool.h>

#define PxIN(p)    ((p)->baseRegister + 0x00)
#define PxOUT(p)   ((p)->baseRegister + 0x02)
#define PxDIR(p)   ((p)->baseRegister + 0x04)
#define PxREN(p)   ((p)->baseRegister + 0x06)
#define PxDS(p)    ((p)->baseRegister + 0x08)
#define PxSEL(p)   ((p)->baseRegister + 0x0A)
#define PxIES(p)   ((p)->baseRegister + 0x18)
#define PxIE(p)    ((p)->baseRegister + 0x1A)
#define PxIFG(p)   ((p)->baseRegister + 0x1C)

#define bit(n)               (1ul << (n))      // From yours: (1 << n)
#define bitSet(v, n)         ((v) |= bit(n))
#define bitClear(v, n)       ((v) &= ~bit(n))
#define bitWrite(v, n, b)    ((b) ? bitSet(v, n) : bitClear(v, n))

typedef enum {
  MSP430_AW_NA,
  MSP430_AW_PWM,
  MSP430_AW_DAC,
} MSP430AnalotWrite_t;

struct msp430_io {
  uint8_t pin;
  uint8_t *baseRegister;
  int8_t portCallbackIndex;
  int8_t adcChannel;
  int8_t analogWriteChannel;
  MSP430AnalotWrite_t analogWriteType;
};

extern const struct msp430_io pinInfo[]; // Remove 'volatile' and array length from yours.

bool digitalWriteInternal(int8_t pin, int value) {
  if (pin < 0) {
    return false;
  }

  volatile uint8_t *sel = PxSEL(&pinInfo[pin]);
  volatile uint8_t *out = PxOUT(&pinInfo[pin]);

  bitClear(*sel, pinInfo[pin].pin);
  bitWrite(*out, pinInfo[pin].pin, value);
  return true;
}
    $ msp430-elf-readelf -rW digital-io.o

Relocation section '.rela.either.text._Z20digitalWriteInternalai' at offset 0x2e4 contains 10 entries:
 Offset     Info    Type                Sym. Value  Symbol's Name + Addend
00000010  00000613 R_MSP430X_10_PCREL     000000e0   .L4 + 0
00000014  00000e0b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
0000005c  00000f0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
00000068  00000713 R_MSP430X_10_PCREL     000000bc   .L5 + 0
0000009e  00000e0f R_MSP430X_ABS16        00000000   pinInfo + 0
000000a6  00000f0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
000000c8  00000e0f R_MSP430X_ABS16        00000000   pinInfo + 0
000000d0  00000f0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
000000dc  0000080b R_MSP430X_ABS20_ADR_SR 000000b2   .L2 + 0
000000e2  0000080b R_MSP430X_ABS20_ADR_SR 000000b2   .L2 + 0

    The points I fixed are considered very minor for me. So strange... As I suggested previously, it will be very good to get detailed information of relocation types and compiler's strategy about them.

    Additionally, I found that msp-gcc-7.3.1.24 generates relocation entries like below:

    $ msp430-gcc-7.3.1.24/bin/msp430-elf-readelf -rW digital-io.o

Relocation section '.rela.either.text._Z20digitalWriteInternalai' at offset 0x2e8 contains 10 entries:
 Offset     Info    Type                Sym. Value  Symbol's Name + Addend
00000010  00000613 R_MSP430X_10_PCREL     000000e2   .L4 + 0
00000014  00000e0b R_MSP430X_ABS20_ADR_SR 00000000   pinInfo + 0
00000058  00000f0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
00000064  00000713 R_MSP430X_10_PCREL     000000b6   .L5 + 0
00000094  00000e08 R_MSP430X_ABS20_EXT_SR 00000000   pinInfo + 0
000000a0  00000f0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
000000c6  00000e08 R_MSP430X_ABS20_EXT_SR 00000000   pinInfo + 0
000000d2  00000f0c R_MSP430X_ABS20_ADR_DS 00000000   __mspabi_slll + 0
000000de  0000080b R_MSP430X_ABS20_ADR_SR 000000ac   .L2 + 0
000000e4  0000080b R_MSP430X_ABS20_ADR_SR 000000ac   .L2 + 0

    Thank you.
    Jongsoo

  • 0 in reply to Jongsoo Jeong
    Expert 2410 points

    Thanks for providing the fixed source code, I now reproduced the problem.

    I'm happy to report this was fixed in the newly released MSP430-GCC 8.2.0.52. This version of the toolchain is available as an update in Code Composer Studio now, it should be available as a direct download on the MSP430-GCC website on ti.com within a couple of weeks.

    The points I fixed are considered very minor for me.

    The key part is the change from "1 << n" to "1ul << n" in the definition of bit(n). The former is shifting a 16-bit value, the latter is shifting a 32-bit value. The code generation to zero extend an 8-bit value to a 32-bit value was not using an MSP430X instruction:

    MOV.B pinInfo(R8),R14 { AND #0xff,R14 { CLR R15  // WRONG
    MOVX.B pinInfo(R8),R14 { AND #0xff,R14 { CLR R15  // CORRECT

    Since the assembler was seeing the MSP430 construction "MOV", it generated a 16-bit relocation for pinInfo. With MOVX it generates a 20-bit relocation.

    So strange... As I suggested previously, it will be very good to get detailed information of relocation types and compiler's strategy about them.

    You can read about the relocation types in the TI MSPABI document here: The MSP430 Embedded Application Binary Interface

    Regards,

  • 0 in reply to Jozef_Lawrynowicz
    Prodigy 100 points

    Hi,

    I'm very pleased that this bug was fixed already, and patched GCC will be released soon.

    Thank you for your attention and support.

    Jongsoo

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