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RTOS/MSP432E401Y: Bus usage of DMA vs active debugging

James McLaughlin
Expert 1090 points

Part Number: MSP432E401Y

Tool/software: TI-RTOS

Hello,

We have a TI-RTOS project and are attempting to use the DMA feature with an SPI peripheral.  We have it functioning pretty well, although notice that in debug mode the response times take much longer than expected, as well as being highly variable (on the order of hundreds of milliseconds).  When we run this in standalone mode without a debugger attached, the same response time is 10-20ms at most and is much more consistent.

Does the debugger happen to use similar "free" bus cycles like the DMA, therefore causing a conflict between the two?

If so, is there any way to adjust that behavior, like having the debugger use less?

If not, is there any other potential explanation for this behavior?

An additional issue for us may be that our RTOS clock tick is set fairly fast (50us), although we observe similar behavior when slowing that down to 500us.

Anywhere specific we should look for this?

Thanks!

  • 0
    TI__Mastermind 22640 points

    Hello James,

    James McLaughlin said:
    We have it functioning pretty well, although notice that in debug mode the response times take much longer than expected, as well as being highly variable (on the order of hundreds of milliseconds).

    How are you calculating this time? The starting and halting of the debugger takes up some time, so wanted to understand if that time is not being considered in this calculation.

    If you are calculating the time based on the response times of the SPI device (talking to the MSP432E401Y) then I will have to look into what could be causing this delay.

    Thanks,

    Sai 

  • 0 in reply to Sai Reddy
    Expert 1090 points

    Yes I am referring to the response time of the SPI device.  We use a GPIO to measure the time from receiving a full message (polling the RX DMA buffer for a terminator) to fully loading the DMA TX buffer and re-enabling the transfer.

    We use a similar method without DMA and don't notice such an extreme slow down when running the debugger vs not.

  • 0 in reply to James McLaughlin
    TI__Mastermind 22640 points

    Hello James,

    I believe JTAG has higher priority than uDMA. While debugging JTAG might be using most of the available bandwidth.

    I could not find any configuration information on reducing the JTAG's bus utilization.

    Thanks,

    Sai

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