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MSP430FR5969: ADC12_B Sample Handling

EmbeddedMike
Expert 1260 points

Part Number: MSP430FR5969

How does the MSP430 handle the samples it collects?

Using the ADC12SHT1x and ADC12SHT0x bits we can choose the sample-and-hold time and we can control which ADC12MEM the result ends up in, but what happens to the sample in between? I'm assuming it gets temporarily stored in a register not visible to software and the sample gets averaged before conversion but I don't see any documentation on this.

  • 0
    TI__Genius 14930 points

    Mike,

    I'm not exactly sure what you mean by the "sample in between". In Pulse Sample Mode, the sample-and-hold time is controlled by the ADC12SHT1x and ADC12SHT0x bits and the selected sample-and-hold time is set according the the required amount of time needed for an accurate conversion:

    An example timing diagram is given below:

    So when a conversion is initiated by the SHI signal, the analog signal is sampled for a certain amount of time, converted, and then the converted value is stored in the ADC12MEMx register. There is no sample in-between each conversion; there is only one sample for every conversion. All of this information and more can be found in the User's Guide.

    Best regards,

    Matt

  • 0 in reply to Matt Calvo
    Expert 1260 points

    Sorry for the confusion. Let me rephrase:

    A sample is collected for some amount of time (t_sample) based on the ADC12SHT0x setting. From my understanding of the ADC SAR core, one single analog value is converted into its binary representation. Before the successive approximation produces a result in ADC12MEMx, how is the t_sample length analog signal stored and reduced to a specific voltage value for conversion?

  • 0 in reply to EmbeddedMike
    TI__Genius 14930 points

    Mike,

    The analog signal being measured is not reduced or "stored" in any way. The sample-and-hold time allows for the internal circuity of the ADC module to settle and then the SAR ADC uses a charge redistribution method over the course of a certain amount of ADCCLK cycles in order to produce a digital representation of the analog signal. A general explanation of this process is given in the follow application report: The operation of the SAR-ADC based on charge redistribution

    Best regards,

    Matt

  • 0 in reply to Matt Calvo
    Expert 1260 points

    Thanks for the info, I learned something new today.

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