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MSP430FR5969: Can I use ADC as circular buffer in low power mode?

Part Number: MSP430FR5969
Other Parts Discussed in Thread: ADS7138, ADS7142

Hello, I am working on an ultra low power application for capturing and storing pulses. 

In my original design, I planned to operate the MSP430FR5969 in LPM3, using the ADC as a circular buffer to capture data. When a level threshold is exceeded, an interrupt routine triggers a write of the ADC in order to capture the initial part of the pulse prior to the pulse peak that triggers the interrupt. 

  • Is it correct that the ADC can operate in LPM3 if clocked at 50kHz? 
  • pg. 44 of the datasheet suggests that the ADC consumes 140 uA of current. Does this spec vary based on clock rate? Is this power consumption in addition to the core power consumption of 0.4uA in LPM3 mode? 
  • For my design requirements, am I better off using an external low power ADC (for example, TI's ADS7142 or ADS7138) as an external buffer to be dumped to FRAM when the FR5969 interrupt routine triggers?  

Thank you for your input

  • Hi Juliana,

    Thanks for using MSP430 device.

    Please find my comments:

    1. ADC can work in LPM3. What's the clock source for 50kHz as you said? You may confirm whether the clock source could work in LPM3 as well.

    2. Sure, you can find the TEST CONDITIONS, which including the ADC clock source, in the Table 5-22. The 140uA is for Operating supply current into AVCC plus DVCC terminals with notes for the table. I guess you are saying the "Standby (LPM3 With VLO): 0.4 µA (Typical)", right? They are different device configuration for LPM3. So, there is no relationship between the two current data. Please take the table 5-22 as your reference.

    3. Let me clarify you design requirements. You are measuring the time period from the raising starting to the peak of a pulse. Right? Could you please give me more detail description of your requirements? It's better you could show me some figure to describe it. BTW, I would like to suggest you thinking about the Comp_E.

    Looking forward to your feedback.

  • Hi Wei, 

    Thank you for your quick reply. 

    1. based on table 6-2 I assumed ACLK would clock ADC

    2. If I understand your reply correctly, in order to approximate total current consumption of processor + ADC, I should sum together the processor's current consumption based on LPM mode as listed in Table 6-1, plus ADC consumption as listed in Table 5-22. 

    3. I need to capture and store sporadic pulses of duration ~300 uS and P2P amplitude around 1-2 volts. I can use a comparator (potentially the onboard comparator) to check for when the signal exceeds 1V. Let's say this happens 100µS into the 300µS pulse. I wake up the MCU and begin recording data, but I must also record the first 100µS of the pulse. Therefore, I must use a buffer - either the onboard ADC, or possibly an external ultra low power ADC. I am designing for ultra low power, so please let me know whether each of these approaches would work correctly. 

  • Hi Juliana,

    1. Yes

    2. The I(ADC12_B) singleended mode in Table 5-22 shows the "Operating supply current into AVCC plus DVCC terminals" which means the whole power consumption of device. Take care of the notes.  That data should be test under LPM mode which the CPU is not running. So I would agree you to add the CPU power consumption to approximate the total.

    3. I would suggest you to use the on chip ADC which could be lower power and also could work with DMA to store the conversion result, which you do not need to wake up the CPU core.

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