Other Parts Discussed in Thread: ADS7138, ADS7142
Hello, I am working on an ultra low power application for capturing and storing pulses.
In my original design, I planned to operate the MSP430FR5969 in LPM3, using the ADC as a circular buffer to capture data. When a level threshold is exceeded, an interrupt routine triggers a write of the ADC in order to capture the initial part of the pulse prior to the pulse peak that triggers the interrupt.
- Is it correct that the ADC can operate in LPM3 if clocked at 50kHz?
- pg. 44 of the datasheet suggests that the ADC consumes 140 uA of current. Does this spec vary based on clock rate? Is this power consumption in addition to the core power consumption of 0.4uA in LPM3 mode?
- For my design requirements, am I better off using an external low power ADC (for example, TI's ADS7142 or ADS7138) as an external buffer to be dumped to FRAM when the FR5969 interrupt routine triggers?
Thank you for your input