Part Number: MSP432P401M
Hello
I would like to understand the meaning of maximum sampling rate specification of MSP432P401.
Both datasheet and TRM says the maximum sampling rate of ADC is 1MSPS.
And the datasheet specifies that maximum ADC clock frequency is 25MHz.
And TRM also says that it takes 22 cycles for 14bit resolution for ADC14MSC=1 condition.
22 cycles with 25MHz ADC clock means 1.136MSPS.
Also I think it takes less than 22 cycled for other resolutions like 12bit.
So I think sampling rate could be over 1MSPS even if ADCCLK is less than 25MHz.
My question is that does the user have to adjust sampling rate to be less than 1MSPS with maybe S/H time adjustment?
Or 1MSPS restriction can be ignored if ADCCLK is within 25MHz?
And where does 1MSPS come from?
Regards,
Oba
