This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CCS/MSP430FR5992: Max Baud Rate on the 4 UART simultaneously.

Part Number: MSP430FR5992


Tool/software: Code Composer Studio

Hi 

I need understand what max Baud Rate can I work with the 4 UART ports simultaneously without loosing data . I have selected this device because low cost 1K/3$.

Best Regards

F Dias

  • So you are thinking on receiving data on all ports simultaneously. I made USB - UART bridge with F5xx family (25 MHz MCLK, no wait states) that was handling 2 ports at 1 Mbps without problems. Lite interrupts (few CPU cycles) with only registers used (not RAM), all coded in assembler. I guess that 115200 bps should not be a problem, if CPU is free most of the time.

  • Hey Fernando,

    I think Zrno gave a good data point.   I think the max baud rate and throughput will depend on your application and how much CPU bandwidth you need.  There is a multichannel DMA, so you could move the data quickly to memory or possibly another peripheral if you aren't trying to process anything in the moment.  

    Can you provide some more information on what you are trying to do?  Maybe we can point to possible bottlenecks.  

    Thanks,

    JD

  • Hi JD , Znro and all

    I have 4 peripherals with baud rate speed 115200 connected to my TI Device MSP430FR5992 or other low cost same capabilities , DMA will help. At the same time I need send the data on SPI to an external central central unit.

    Regards

    F Dias

  • Hey Fernando,

    The MSP430FR5992 has 8 eUSCIs, so using 4x for simultaneous UART and 1x for SPI is doable.  These eUSCIs are independent and have independent interrupt vectors.  I don't see why they can't all support 115200 at the same time and SPI should be plenty fast enough to stream the data out.  

    I think handling the data will definitely require the use of the DMA.  Using CPU could add bottlenecks and possible delays trying to service ISRs from multiple eUSCIs at the same time. 

    Is the data flow always constant?  If so, My only concern is how to package the 4 separate data streams in real-time to then send out of the SPI. 

    Thanks,

    JD  

  • Hi JD and all

    Many thanks again for your replay and for all interested in this matter.

    A few points that needed to be stressed i think with my modest knowledge on this device.

    DMA , we have 6 channels it will free the CPU for use SPI and for the UART ,cpu has more time  decode the SPI and UART packets 

    BUFFER , I need the create 5 buffers  , using  FRAM  125ns per word, 128KB for FRAM good size and help a lot . 

    Crystal selection, I see from datasheet the wait states to access FRAM can be automatic.

    Use SRAM , we have 8KB, for temporary buffer if FRAM is slow to erase

    In theory the SPI needs speed >= 4x115200 bps, it is not an issue for the moment

    FRAM maximum throughput=1400kBps ( not sure yet if it is per byte ou per bits ), it takes 700 ns per byte  on read access , slower than write.

    Regards

    F Dias

**Attention** This is a public forum