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CCS/MSP432P401R: I2C Read/Write functions

Part Number: MSP432P401R

Tool/software: Code Composer Studio

Hi TI coomunity

I am using a chip, BMI160, in my application that for data transmission, I need to run I2C protocol.

-To configure the chip, I have written a function that first, sends the register address, reg_addr, then sends the len bytes register data in which to define the register value,*reg_data. 

-To read data from the chip, another function is written that first sends the register address,reg_addr, then read len byte from that register, *reg_data.

The functions work with the interrupts. The problem I have here that the code doesn't go to the receive interrupt.   

1- I have configured the I2C module like below:

 // Enable eUSCIB0 interrupt in NVIC module
    NVIC->ISER[0] = 1 << ((EUSCIB1_IRQn) & 31);

    // Configure USCI_B0 for I2C mode
    EUSCI_B1->CTLW0 |= EUSCI_B_CTLW0_SWRST; // put eUSCI_B in reset state
    EUSCI_B1->CTLW0 = EUSCI_B_CTLW0_SWRST | // Remain eUSCI_B in reset state
            EUSCI_B_CTLW0_MODE_3 |          // I2C mode
            EUSCI_B_CTLW0_MST |             // I2C master mode
            EUSCI_B_CTLW0_SYNC |            // Sync mode
            EUSCI_B_CTLW0_SSEL__SMCLK;      // SMCLK
    EUSCI_B1->BRW = 0x001E;                 // baudrate = SMCLK /30
    EUSCI_B1->CTLW0 &= ~EUSCI_B_CTLW0_SWRST;// clear reset register
    EUSCI_B1->IE |= EUSCI_B_IE_TXIE0 |      // Enable transmit interrupt
            EUSCI_B_IE_NACKIE|             // Enable NACK interrupt
            EUSCI_B_IE_RXIE0;              // Enable RECEIVE interrupt

2- The write function is as follows:

int8_t user_i2c_write(uint8_t dev_id, uint8_t reg_addr, uint8_t *reg_data, uint16_t len)
{

    DataWrite[1]=reg_addr;
    DataWrite[2]=*reg_data;

    TXByteCtr=2;
    // configure slave address
     EUSCI_B1->I2CSA = dev_id;
     // Ensure stop condition got sent
     while (EUSCI_B0->CTLW0 & EUSCI_B_CTLW0_TXSTP);
     EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_TR|EUSCI_B_CTLW0_TXSTT; // I2C TX
retun 0;
}

3- The read function is as follows:

int8_t user_i2c_read(uint8_t dev_id, uint8_t reg_addr, uint8_t *reg_data, uint16_t len)
    {
   
    // Initialize data variable
    RXDataPointer = 0;
    DataWrite[1]=reg_addr;
    TXByteCtr1=1;
    // configure slave address
     EUSCI_B1->I2CSA = dev_id;
     // Ensure stop condition got sent
     while (EUSCI_B0->CTLW0 & EUSCI_B_CTLW0_TXSTP);
     EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_TR|EUSCI_B_CTLW0_TXSTT; // I2C TX
     // Ensure stop condition got sent
     while (EUSCI_B0->CTLW0 & EUSCI_B_CTLW0_TXSTP);
     // I2C start condition
     EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_TXSTT;

     // Ensure stop condition got sent
     while (EUSCI_B0->CTLW0 & EUSCI_B_CTLW0_TXSTP);
return 0; }

4- And finally, the I2C interrupt handler vector is as follows:

void EUSCIB1_IRQHandler(void)
{
    if (EUSCI_B1->IFG & EUSCI_B_IFG_NACKIFG)
    {
        EUSCI_B1->IFG &= ~EUSCI_B_IFG_NACKIFG;

        // I2C start condition
        UCB1CTL1 |= EUSCI_B_CTLW0_TXSTT;
    }
    if (EUSCI_B1->IFG & EUSCI_B_IFG_TXIFG0)
    { 
    EUSCI_B0->IFG &= ~EUSCI_B_IFG_TXIFG0;

           // Check TX byte counter
           if (TXByteCtr)
           {
               // Load TX buffer
               EUSCI_B0->TXBUF = DataWrite[TXByteCtr];

               // Decrement TX byte counter
               TXByteCtr--;
           }
           else
           {
               // I2C stop condition
               EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_TXSTP;

               // Clear USCI_B0 TX int flag
               EUSCI_B0->IFG &= ~EUSCI_B_IFG_TXIFG;
           }
    if (EUSCI_B1->IFG & EUSCI_B_IFG_RXIFG0)
          {
           EUSCI_B1->IFG &= ~ EUSCI_B_IFG_RXIFG0;
              // Get RX data
           // Get RX data
           RXData[RXDataPointer++] = EUSCI_B0->RXBUF;

           if (RXDataPointer > len)
           {
               RXDataPointer = 0;
           }
              // Clear USCI_B0 TX int flag
              EUSCI_B1->IFG &= ~EUSCI_B_IFG_RXIFG;

         }
}
}

Does anyone have idea why this problem happen?

Thanks

Saber

 

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