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Original question:

External timer input capture maximum frequency

MSP430F2272: Timer Capture Maximum Frequency

Thiago Cruz
Prodigy 150 points

Part Number: MSP430F2272

Hi everyone.

I'm trying to measure the frequency of a square wave connected to P4.4 (TB1)  port of a MSP430F2272 device. Frequency should be in the near 2MHz.

My clocks are configured as:

MCLK    - 8 MHz
SMCLK - 8 MHz
ACLK    - 1 MHz

Timer B configuration:

TBCTL   = (CNTL_0 | TBSSEL_2 | ID_0 | MC_0 | TBIE);     
TBCCTL1 = (CM_1 | CCIS_1 | CAP | CCIE | SCS);           
TBCCTL1 &=~COV;

Timer B ISR:

#pragma vector=TIMER0_B1_VECTOR
__interrupt void Timer_B1(void)
{
    switch( __even_in_range(TBIV,14) )
        {
          case  0: break;                          // No interrupt
          case  2:
              TB_Pulse0 = TB_Pulse1;
              TB_Pulse1 = TBCCR1;
              DayData[HourAD][HourQuarter][4] = (TB_Pulse1 - TB_Pulse0);              
              TBCCTL1 &= ~CCIFG;
              break;
          case  4: break;                          // CCR1 not used
          case  6: break;                          // CCR3 not used
          case  8: break;                          // CCR4 not used
          case 10: break;                          // CCR5 not used
          case 12: break;                          // CCR6 not used
          case 14:
              TBCCTL1 &= ~COV;
              break;
          default: break;
        }    
	return;
}

All other interruptions are disabled!

My problem: The maximum frequency that I can correctly measure is at ~70KHz.

Any suggestions about what's wrong?

  • 0
    Guru 102905 points

    With a 2MHz input signal and MCLK=8MHz, that's only 4 CPU clocks per cycle. You will not succeed. Even at MCLK=16MHz (polling) you won't succeed, since 8 CPU clocks is less than 2 (average) instructions.

    You can manage a higher rate by using polling (no interrupts) and storing the result using a pre-computed pointer (no indexing). 

    You can do frequency counting by connecting your signal to TBCLK (P4.7) and use TBSSEL=0. Then use another timer to measure some fixed period and do the arithmetic.

  • 0 in reply to Bruce McKenney
    Prodigy 150 points

    Bruce,

    That's right, I'll have to manage the input signal with another approach.

    But, why a 70 KHz already is my frequency limit?

    Thanks.

  • 0 in reply to Thiago Cruz
    Guru 102905 points

    I'll turn it around: 8MHz/70kHz = ~114, so it's taking you 114 CPU clocks to process a cycle (edge).

    Estimate about 30 clocks to get into/out of the ISR, 10 or so to process the IV, that leaves about 70 clocks doing the triple-indexing in the assignment. 

    It might be instructive to create a .LST file ("Build settings->Compiler->Assembler options") to see how many instructions that actually takes, at 3-5 clocks/instruction. If the subscripts don't change often, you could instead generate a pointer to the element you expect to update next and just "*ptr = new - prev".

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