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MSP432E401Y: SPI slave/master example code issue

Part Number: MSP432E401Y

Hello,

I am attempting to run the SimpleLink spimaster and spislave example code running on two MSP432E401Y LaunchPad platforms from the latest SimpleLink SDK (version 3.30.0.22).    I can only get the example code to run correctly if I reverse the MOSI and MISO pins between the master and slave devices - the text messages exchanged between  the master and slave are displayed correctly.    If I connect MOSI->MOSI and MISO->MISO the example appears to run but the text messages transmitted between the master and slave are blank.   My understanding of SPI convention is the master MOSI should be connected to the slave MOSI pin and vice versa (slave MISO to master MISO).    I am using the examples "out of the box": with no changes.  Please provide guidance on this issue.   Is there a bug in the example code or am I missing something?

Regards,

Tim

  • The msp432e401y QSSI doesn't use the terms MISO and MOSI, rather Tx and Rx, so the pins have to be cross-connected. [Ref TRM (SLAU723) NOTEs in Sec 23.3.2.1-2]

    I wasn't able to find examples by the names you mentioned, but both spi_master_legacy_polling.c and spi_slave_legacy_polling.c indicate the cross-connections in the block comments at the beginning.

  • Bruce,

    Your reply surprises me.   You can easily find both of these examples in the SimpleLink SDK directory under C:\ti\simplelink_msp432e4_sdk_3_30_00_22\examples\rtos\MSP_EXP432E401Y\drivers\spimaster and C:\ti\simplelink_msp432e4_sdk_3_30_00_22\examples\rtos\MSP_EXP432E401Y\drivers\spislave.    So, according the Readme.html in the spimaster example code the MOSI connects to the MOSI and the MISO connects to the MISO pins.   See the excerpt from the Readme below.   Is your documentation for this example wrong?

    Regards,
    Tim

    Before running the example the following pins must be connected between master& slave devices.

    SPI Master LaunchPadSPI Slave LaunchPad
    CONFIG_SPI_MASTER CLK CONFIG_SPI_SLAVE CLK
    CONFIG_SPI_MASTER MOSI CONFIG_SPI_SLAVE MOSI
    CONFIG_SPI_MASTER MISO CONFIG_SPI_SLAVE MISO
    CONFIG_SPI_MASTER CS CONFIG_SPI_SLAVE CS
    CONFIG_SPI_MASTER_READY CONFIG_SPI_MASTER_READY
    CONFIG_SPI_SLAVE_READY CONFIG_SPI_SLAVE_READY

    The SPI can be used in 4-pin or 3-pin modes (chip select is optional). When running this example SPI peripherals on both SimpleLink devices must align on chip select use. Users must verify before running the example.

  • Oh, there they are. Following the README to "<SDK_INSTALL_DIR>/source/ti/boards/<BOARD>/Board.html" I see:

    Board_SPI_MASTER PD3 - CLK, PD1 - XDAT0\MOSI, PD0 - XDAT1\MISO, PD2 - FSS\CS (XDAT0 serves as TX and XDAT1 serves as RX)
    Board_SPI_SLAVE PD3 - CLK, PD1 - XDAT0\MISO, PD0 - XDAT1\MOSI, PD2 - FSS\CS (XDAT1 serves as TX and XDAT0 serves as RX)

    so the recommended wiring MISO->MISO does the PD0/PD1 cross-connect I suggested.

    OK, if that's how you wired it I don't know what's wrong.

  • Bruce,

    Thanks for finding it.   It was not obvious in the example documentation and even less so using the .syscfg tool.   SysCfg indicates that MOSI is mapped to the same pin PD0 and MOSI to PD1 regardless of slave or master configuration.  So given normal SPI convention I would expect the pins to be one-to-one between the master and slave.   It is very confusing.    Again, thanks for your help.

    Regards,

    Tim

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