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MSP430FR2355: GIE bit cleared, possible causes?

Torben Schmidt
Prodigy 240 points

Part Number: MSP430FR2355

Hi,

I use a MSP430FR2355 for frequency measurement and temperature measurement/control. The MSP is connected to a master CPU via UART. I observed that, after some minutes or sometimes even seconds, the MSP was not responding via UART any more. So I attached a debugger and tried to understand what was going on. After several minutes of flawless operation, the MSP stopped responding.

When stopping program execution, I saw that the GIE bit in the Status Register (SR) was cleared, but the program continued to run in my main loop and all other functions (except ISRs). When stopping program execution during "normal" operation, GIE remains set, so the "clearing" of the GIE bit is not because of the debugger. I did some research on this topic, in the device datasheets and on the internet, but there was not much to find about my issue. I found an E2E Forum post about GIE being cleared when step debugging, but as I mentioned, I don't think my debugger clears the GIE bit (I am just halting program execution, not step debugging).

Could it be that is has something to do with FRAM access faults? I am operating at 8 MHz, so inserting FRAM wait states didn't seem necessary to me. Nevertheless, I inserted two FRAM wait states (as recommended for operations at clock frequencies more than 8 MHz), and it seems to me that the MSP now works without Errors. But an FRAM access fault should result in a PUC, if I understand the device family user's guide correctly, which in turn would lead to a device reset (which does not happen in my case).

Any ideas/thoughts on this topic?

  • 0
    TI__Mastermind 49692 points

    Hi Torben,

    Is there a chance that your MCLK frequency is exceeding 8 MHz based on your configuration? I'm not sure how the FRAM wait states are impacting the GIE bit, but perhaps you're running at a higher-than-expected frequency. You can output MCLK through an IO to measure the actual frequency. You could also go back to no wait states at an MCLK frequency much lower than the 8 MHz limit such as 4 MHz.

    Regards,

    James

  • 0 in reply to James Evans
    Prodigy 240 points

    Hi James,

    I am using an external 8 MHz Crystal. I have MCLK and SMCLK output through the respective pins to monitor the clock frequency. With an oscilloscope, I can measure a frequency slightly above 8 MHz (8.010 MHz) which seems OK to me at first glance. How hard is the limit of 8 MHz? Is 8.010 MHz already too much?

  • 0 in reply to Torben Schmidt
    TI__Mastermind 49692 points

    Hi Torben,

    Thanks for measuring that! I would assume that the 8 MHz upper limit is a hard limit especially since it seems that the issue goes away when you use wait states.

    Regards,

    James

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